EP 0000327 B1 19820113 - METHOD FOR MAKING SELF-ALIGNED INTEGRATED SEMICONDUCTOR DEVICES
Title (en)
METHOD FOR MAKING SELF-ALIGNED INTEGRATED SEMICONDUCTOR DEVICES
Publication
Application
Priority
US 81480177 A 19770712
Abstract (en)
[origin: EP0000327A1] ICs are mfrd. by (a) forming superimposed first, second and third masking layers, selectively etchable w.r.t. each other, on a semiconductor substrate, (b) etching a set of openings in the first layer only (c) etching a first subset of openings within the set, through at least the second layer, using the first layer as a mask, while protecting remaining openings, (d) forming first regions in the substrate through the first subset of openings, and (e) similarly forming second and third regions using second and third subsets of openings. Regions are self-aligned and formed without undercutting, allowing reduced size of devices and reduced distance between them.
IPC 1-7
IPC 8 full level
H01L 21/306 (2006.01); H01L 21/331 (2006.01); H01L 21/76 (2006.01); H01L 21/8238 (2006.01)
CPC (source: EP US)
H01L 21/8238 (2013.01 - EP US); H01L 29/66272 (2013.01 - EP US); Y10S 438/942 (2013.01 - EP)
Designated contracting state (EPC)
DE FR GB
DOCDB simple family (publication)
EP 0000327 A1 19790124; EP 0000327 B1 19820113; DE 2861528 D1 19820225; JP S5419668 A 19790214; US 4135954 A 19790123
DOCDB simple family (application)
EP 78100092 A 19780606; DE 2861528 T 19780606; JP 7661978 A 19780626; US 81480177 A 19770712