EP 0047175 B1 19851211 - SPEECH SYNTHESIZER APPARATUS
Title (en)
SPEECH SYNTHESIZER APPARATUS
Publication
Application
Priority
JP 12084180 A 19800901
Abstract (en)
[origin: US4429367A] A speech synthesis device includes a memory for storing speech information at a plurality of memory locations with each location commencing at a respective leading address, and a table of leading addresses is maintained in the memory. At the beginning of operation, the leading addresses are read from the table and stored in a random access memory so that the leading addresses can be selectively accessed by keyed in information. Address generation circuitry will then successively address the data in each information area of memory in reponse to a particular accessed leading address.
IPC 1-7
IPC 8 full level
G10L 13/00 (2006.01); G10L 13/04 (2006.01)
CPC (source: EP US)
G10L 13/00 (2013.01 - EP US)
Designated contracting state (EPC)
DE FR GB
DOCDB simple family (publication)
EP 0047175 A1 19820310; EP 0047175 B1 19851211; EP 0047175 B2 19890405; DE 3173196 D1 19860123; JP S5745598 A 19820315; JP S6237796 B2 19870814; US 4429367 A 19840131
DOCDB simple family (application)
EP 81303997 A 19810901; DE 3173196 T 19810901; JP 12084180 A 19800901; US 29840981 A 19810901