EP 0094559 B1 19880302 - METHOD OF MANUFACTURING INTEGRATED MOS FIELD EFFECT TRANSISTORS WITH AN ADDITIONAL INTERCONNECTION LEVEL CONSISTING OF METAL SILICIDES
Title (en)
METHOD OF MANUFACTURING INTEGRATED MOS FIELD EFFECT TRANSISTORS WITH AN ADDITIONAL INTERCONNECTION LEVEL CONSISTING OF METAL SILICIDES
Publication
Application
Priority
DE 3218309 A 19820514
Abstract (en)
[origin: EP0094559A1] 1. A process for the production of integrated MOS field effect transistors, particularly but not exclusively complementary MOS field effect transistor circuits (CMOC-FETs), in which a layer structure consisting of high-melting point metal silicides, such as silicides of molybdenum, tungsten, tantalum, or titanium, is used as an additional conductor path level, and in which a layer of silicon oxide containing phosphorus is used as intermediate oxide between the metal silicide level and the metal conductor path level, characterised by the sequence of the following process steps : a) etching away of the oxide layer (3) from the entire surface above the doped zones (5) produced by ion implantation, of the substrate (1) which contains the doped, structured polysilicon gate electrode (4) and the field oxide zones (2), which separate the active zones (5) of the MOS field effect transistor, b) deposition of a SiO2 -layer (6) containing phosphorus, on to the entire surface, c) introduction of the contact holes (7, 10) into the phosphorus-glass layer (6) for the additional conductor path level (11) which consists of silicide, both to the doped polysilicon zones (4) and to the active zones (5) produced by ion implantation, using an etching agent which has a high selectivity for phosphorous-glass as compared with SiO2 , whereby the contacts (14) to the active zones (5) subsequently produced, are formed so as to overlap the field oxide edge (2), d) deposition of a metal silicide layer and structuring of the silicide layer (11) in such manner that a large silicide patch (mushroom) is formed above all the contact holes (7, 10), e) deposition of a further phosphorus-glass layer (13) which serves as insulating layer, f) introduction of the contact holes (14) into the second insulating layer (13) for the contacts of the outer conductor path level (12) to the silicide conductor path level (11), and g) formation of the outer conductor path level (12).
IPC 1-7
IPC 8 full level
H01L 21/306 (2006.01); H01L 21/311 (2006.01); H01L 21/316 (2006.01); H01L 21/768 (2006.01); H01L 21/82 (2006.01); H01L 23/522 (2006.01); H01L 29/78 (2006.01)
CPC (source: EP)
H01L 21/31111 (2013.01); H01L 21/76889 (2013.01); H01L 2924/0002 (2013.01)
Citation (examination)
- DE 3027954 A1 19820225 - SIEMENS AG [DE]
- EP 0072522 A2 19830223 - SIEMENS AG [DE]
Designated contracting state (EPC)
AT DE FR GB IT SE
DOCDB simple family (publication)
EP 0094559 A1 19831123; EP 0094559 B1 19880302; AT E32805 T1 19880315; CA 1200616 A 19860211; DE 3218309 A1 19831117; DE 3375860 D1 19880407; JP S58209145 A 19831206
DOCDB simple family (application)
EP 83104402 A 19830504; AT 83104402 T 19830504; CA 428109 A 19830513; DE 3218309 A 19820514; DE 3375860 T 19830504; JP 8245483 A 19830511