EP 0117903 A2 19840912 - Semiconductor memory device with decoding arrangement.
Title (en)
Semiconductor memory device with decoding arrangement.
Title (de)
Halbleiterspeichervorrichtung mit Dekodierungsanordnung.
Title (fr)
Mémoire semi-conductrice avec un dispositif de décodage.
Publication
Application
Priority
JP 20055382 A 19821116
Abstract (en)
A semiconductor memory device which is hardly affected by short-circuiting between word lines and can be fabricated with a high integration density is disclosed. The memory device is featured in that a plurality of word lines are asigned to each decoder in common via plurality of selection circuits and each adjacent word lines are connected to different decoders.
IPC 1-7
IPC 8 full level
G11C 11/413 (2006.01); G11C 8/10 (2006.01); G11C 11/408 (2006.01); G11C 29/00 (2006.01); G11C 29/04 (2006.01)
CPC (source: EP US)
G11C 8/10 (2013.01 - EP US); G11C 11/4087 (2013.01 - EP US)
Designated contracting state (EPC)
DE FR GB
DOCDB simple family (publication)
EP 0117903 A2 19840912; EP 0117903 A3 19861008; EP 0117903 B1 19890823; DE 3380467 D1 19890928; JP S5990291 A 19840524; US 4584674 A 19860422
DOCDB simple family (application)
EP 83111438 A 19831115; DE 3380467 T 19831115; JP 20055382 A 19821116; US 55222183 A 19831116