EP 0122363 B1 19890906 - A RE-PROGRAMMABLE PLA
Title (en)
A RE-PROGRAMMABLE PLA
Publication
Application
Priority
US 45717583 A 19830111
Abstract (en)
[origin: EP0122363A2] This disclosure relates to a programmable logic array having an AND array disposed for receiving n input signals, an OR array providing k output signals on k output lines and m term lines coupling the AND and OR arraystogether. Newand improved AND and OR arrays are disclosed wherein the AND array includes n X m cells and each cell has first and second transistor means coupled in series between one of the term lines and a reference potential. Each cell includes a storage element that has an output terminal coupled to the control element of the first transistor means and one of the n input terminals is coupled to the control element of the second transistor means. The OR array includes m X k cells wherein each cell has third and fourth transistor means coupled in series between one of said output lines and a reference potential. Each of the OR array cells also includes a storage element having an output terminal coupled to the control element of the third transistor and one of the m term lines is coupled to the control element of the fourth transistor.
IPC 1-7
IPC 8 full level
H03K 19/177 (2006.01)
CPC (source: EP US)
H03K 19/17712 (2013.01 - EP US)
Designated contracting state (EPC)
BE DE FR GB NL SE
DOCDB simple family (publication)
EP 0122363 A2 19841024; EP 0122363 A3 19860507; EP 0122363 B1 19890906; DE 3479697 D1 19891012; HK 77992 A 19921023; JP S59152729 A 19840831; SG 75392 G 19921002; US 4508977 A 19850402
DOCDB simple family (application)
EP 84100234 A 19840111; DE 3479697 T 19840111; HK 77992 A 19921015; JP 334484 A 19840110; SG 75392 A 19920723; US 45717583 A 19830111