EP 0231928 A3 19910102 - PROGRAM CONTROL CIRCUIT
Title (en)
PROGRAM CONTROL CIRCUIT
Publication
Application
Priority
JP 2226786 A 19860203
Abstract (en)
[origin: EP0231928A2] A program control circuit comprises a register for holding the repetition number of a program operation to be repeated, a counter receiving the content of the register and adapted to decrement in response with each execution of the program operation to be repeated, a memory for storing a sequence of instructions, and a controller for transferring an instruction read from the memory means without modificaton in a normal condition and for modifying the instruction read from the memory into a no-operation instruction when the content of the counter becomes a predetermined content
IPC 1-7
IPC 8 full level
G06F 9/32 (2006.01)
CPC (source: EP US)
G06F 9/325 (2013.01 - EP US)
Citation (search report)
- [X] US 4097920 A 19780627 - OZGA STANLEY EDWARD
- [X] IBM TECHNICAL DISCLOSURE BULLETIN, vol. 25, no. 9, February 1983, pages 4569-4571, New York, US; J. GONZALEZ et al.: "Branch mechanism for program loops"
- [X] PATENT ABSTEACTS OF JAPAN, vol. 7, no. 212 (P-224)[1357], 20th September 1983; & JP-A-58 107 960 (NIPPON DENKI K.K.) 27-06-1983
- [X] PATENT ABSTRACTS OF JAPAN, vol. 7, no. 228 (P-228)[1373], 8th October 1983; & JP-A-58 117 050 (FUJITSU K.K.) 12-07-1983
Designated contracting state (EPC)
DE FR GB
DOCDB simple family (publication)
EP 0231928 A2 19870812; EP 0231928 A3 19910102; EP 0231928 B1 19950517; DE 3751297 D1 19950622; DE 3751297 T2 19951019; JP S62180427 A 19870807; US 5056004 A 19911008; US 5511207 A 19960423
DOCDB simple family (application)
EP 87101405 A 19870203; DE 3751297 T 19870203; JP 2226786 A 19860203; US 25808288 A 19881014; US 69406591 A 19910501