EP 0240870 A2 19871014 - Instruction prefetch unit.
Title (en)
Instruction prefetch unit.
Title (de)
Befehlsvorausholeinheit.
Title (fr)
Unité de préextraction d'instructions.
Publication
Application
Priority
US 85101286 A 19860411
Abstract (en)
Symbolic processing method and system. A microprogrammable processor carryies out compiled functions in accordance with a predetermined series of macroinstructions and a main memory stores macroinstructions therein and communicates with the processor over a bus. A unit is disposed in the processor for prefetching a plurality of successive macroinstructions from the main memory at the initiation of a new compiled function including a plurality of instruction buffer registers (111, 112, 113) for storing the macroinstructions and which refills the buffer registers with successive macroinstructions as the buffer registers become empty.
IPC 1-7
IPC 8 full level
G06F 9/22 (2006.01); G06F 9/28 (2006.01); G06F 9/38 (2006.01); G06F 9/44 (2006.01)
CPC (source: EP)
G06F 8/312 (2013.01); G06F 9/3802 (2013.01); G06F 9/3814 (2013.01)
Designated contracting state (EPC)
AT BE CH DE ES FR GB GR IT LI LU NL SE
DOCDB simple family (publication)
EP 0240870 A2 19871014; AU 7110487 A 19871015; IL 81762 A0 19871020; JP S62245439 A 19871026
DOCDB simple family (application)
EP 87104568 A 19870327; AU 7110487 A 19870406; IL 8176287 A 19870304; JP 8964587 A 19870411