EP 0279231 B1 19940119 - A graphics function controller for a high performance video display system.
Title (en)
A graphics function controller for a high performance video display system.
Title (de)
Grafik-Prozessor für ein hochauflösendes Video-Anzeige-System.
Title (fr)
Processeur d'affichage vidéo en mode graphique pour un système d'affichage vidéo à haute performance.
Publication
Application
Priority
US 1384987 A 19870212
Abstract (en)
[origin: EP0279231A2] A processing system is provided that includes an external device connected to a processor. The external device has the capability of responding to external device commands wherein each of these external device commands is performed within at least one fixed time period. The processor provides these external device commands and further includes the means for executing instructions that not only specify the external device commands but also specify at least one internal command to be performed internally by the processor simultaneously with the performance of the external commands by the external device. In the disclosed embodiment, a graphics display system is provided that includes a system processor, a graphics processor, a graphics memory and a display device. The graphics processor receives instructions from the system processor. These instructions specify commands to be executed in both the graphics processor and in the graphics memory. The commands executed in the graphics memory are executed within a fixed time period. The commands executed by the graphics processor are also executed within this fixed time period simultaneously with the execution of the commands in the graphics memory. The graphics processor further includes control circuitry for controlling the execution of the graphics processor commands. The control circuitry is connected to several registers in the graphics processor which receive instructions from the system processor. These system processor instructions specify commands from both the graphics memory and the graphics processor. The control circuitry provides for the execution of these instructions in these registers in a serial loop fashion.
IPC 1-7
IPC 8 full level
G06T 11/00 (2006.01); G09G 5/393 (2006.01)
CPC (source: EP)
G09G 5/393 (2013.01)
Designated contracting state (EPC)
DE FR GB IT
DOCDB simple family (publication)
EP 0279231 A2 19880824; EP 0279231 A3 19910703; EP 0279231 B1 19940119; BR 8800332 A 19880913; DE 3887176 D1 19940303; DE 3887176 T2 19940630; JP S63201791 A 19880819
DOCDB simple family (application)
EP 88101084 A 19880126; BR 8800332 A 19880128; DE 3887176 T 19880126; JP 327888 A 19880112