EP 0297932 A3 19891227 - BUS TRANSMITTER HAVING CONTROLLED TRAPEZOIDAL SLEW RATE
Title (en)
BUS TRANSMITTER HAVING CONTROLLED TRAPEZOIDAL SLEW RATE
Publication
Application
Priority
- IN 290DE1988 A 19880408
- US 6794587 A 19870629
Abstract (en)
[origin: EP0297932A2] A transmitter circuit (10) for transmitting a digital data signal over a bus line (14) in a digital data processing system includes a MOSFET bus driver transistor (11) having a gate to drain capacitance (CGD) which substantially dominates other capacitances at the gate terminal. The bus driver transistor (11) is driven by a buffer circuit (12) having pull-up and pull-down transistors (16, 17), the current through which is controlled by current sources (20, 21). The gate terminal of the driver transistor (11) is connected to, and controlled by, the node (22) between the pull-up and pull-down transistors (16, 17). The drain terminal of the driver transistor (11) is connected to, and controls, a bus line (14). To assert a signal on the bus line (14), the pull-up transistor is turned on to drive current into the node (22) at a rate governed by the current source (20), which increases the voltage level of the node (22). When the voltage level of the node (22) reaches the driver transistor's threshold level, the driver transistor (11) begins to turn on, allowing the voltage level of the bus line (14) to drop. Contemporaneously, current flows into the node (22) from the bus line (14) through the driver transistor's high gate to drain capacitance (CGD), thereby limiting the voltage level of the node (22), and thus the current flow through the driver transistor (11). Thus, current flows through the driver transistor (11) from the bus line (14) in a manner controlled, in part, by the voltage level on the bus line (14). In negating a signal on the bus line (14), the operations are similar, with current flowing out of the node (22) through the pull-down transistor (17) and the driver transistor's gate to drain capacitance (CGD).
IPC 1-7
IPC 8 full level
G06F 3/00 (2006.01); H03K 4/94 (2006.01); H03K 17/16 (2006.01); H03K 17/687 (2006.01); H03K 19/003 (2006.01); H03K 19/0175 (2006.01); H03K 19/0185 (2006.01); H03K 19/0948 (2006.01); H04L 25/02 (2006.01)
CPC (source: EP)
H03K 4/94 (2013.01); H03K 17/163 (2013.01); H03K 19/00361 (2013.01); H03K 19/0948 (2013.01)
Citation (search report)
- [Y] EP 0143699 A2 19850605 - DIGITAL EQUIPMENT CORP [US]
- [Y] US 4504779 A 19850312 - HAMAN DANIEL J [US]
- [A] US 4593206 A 19860603 - NEIDORFF ROBERT A [US], et al
- [A] PATENT ABSTRACTS OF JAPAN
- PATENT ABSTRACTS OF JAPAN
Designated contracting state (EPC)
AT BE CH DE ES FR GB GR IT LI LU NL SE
DOCDB simple family (publication)
EP 0297932 A2 19890104; EP 0297932 A3 19891227; EP 0297932 B1 19940112; AU 1434688 A 19890105; AU 608822 B2 19910418; CA 1292521 C 19911126; DE 3887016 D1 19940224; IN 172403 B 19930717; JP S6439814 A 19890210
DOCDB simple family (application)
EP 88400859 A 19880408; AU 1434688 A 19880407; CA 566114 A 19880506; DE 3887016 T 19880408; IN 290DE1988 A 19880408; JP 16235888 A 19880629