EP 0302562 B1 19920930 - FREQUENCY SYNTHESIZER HAVING A TUNING INDICATOR DEVICE
Title (en)
FREQUENCY SYNTHESIZER HAVING A TUNING INDICATOR DEVICE
Publication
Application
Priority
FR 8710726 A 19870729
Abstract (en)
[origin: JPS6444623A] PURPOSE: To obtain the synthesizer having a tuning display unit which does not require control depending upon parameters of a duty cycle and an operating frequency even if they vary by obtaining a tuning indication signal from a phase signal representing the phase leading and lagging between a tuning frequency signal and a reference frequency signal. CONSTITUTION: A phase detector 4 supplies a phase signal PS1 or PS2 according to the phase of the tuning frequency signal F-r leads or lags behind the phase of the reference signal FR. Here, PS1 and PS2 are used for a phase fixation loop. With a tuning frequency signal 7, PS1 is supplied to one input of an AND gate 34 and then supplied to the other input through a delay circuit 32. The outputs of AND gates 33 and 34 are supplied to an OR gate 35, which outputs a signal S3. A register 72 receives FR and S3 and operates so that a tuning display signal level corresponds to tuning only when S3 has a level showing the stable tuning for at least two successive cycles of FR.
IPC 1-7
IPC 8 full level
H03L 7/18 (2006.01); H03L 7/095 (2006.01); H03L 7/089 (2006.01)
CPC (source: EP US)
H03L 7/095 (2013.01 - EP US); H03L 7/0891 (2013.01 - EP US); Y10S 331/02 (2013.01 - EP US)
Designated contracting state (EPC)
DE FR GB IT
DOCDB simple family (publication)
EP 0302562 A1 19890208; EP 0302562 B1 19920930; DE 3875019 D1 19921105; DE 3875019 T2 19940127; FR 2618958 A1 19890203; FR 2618958 B1 19950421; JP 2885287 B2 19990419; JP S6444623 A 19890217; US 4862105 A 19890829
DOCDB simple family (application)
EP 88201628 A 19880728; DE 3875019 T 19880728; FR 8710726 A 19870729; JP 18954288 A 19880728; US 22550088 A 19880728