Global Patent Index - EP 0312764 A3

EP 0312764 A3 19910410 - A DATA PROCESSOR HAVING MULTIPLE EXECUTION UNITS FOR PROCESSING PLURAL CLASSES OF INSTRUCTIONS IN PARALLEL

Title (en)

A DATA PROCESSOR HAVING MULTIPLE EXECUTION UNITS FOR PROCESSING PLURAL CLASSES OF INSTRUCTIONS IN PARALLEL

Publication

EP 0312764 A3 19910410 (EN)

Application

EP 88114878 A 19880912

Priority

US 10965687 A 19871019

Abstract (en)

[origin: EP0312764A2] A data processor is disclosed which enables the selective simultaneous or asynchronous execution of mutually independent instructions of different classes in parallel coupled execution units and which enables the sequential execution of mutually dependent instructions of different classes by delaying the execution of a dependent instruction in a second execution unit until the completion of execution of a precursor instruction in a first execution unit. The instructions are dispatched to respective ones of a plurality of parallel coupled execution units, in accordance with their instruction class.

IPC 1-7

G06F 9/38

IPC 8 full level

G06F 9/30 (2006.01); G06F 9/38 (2006.01)

CPC (source: EP US)

G06F 9/30 (2013.01 - EP US); G06F 9/3836 (2013.01 - EP US); G06F 9/3873 (2013.01 - EP US); G06F 9/3885 (2013.01 - EP US); G06F 9/3889 (2013.01 - EP US)

Citation (search report)

  • [X] US 3346851 A 19671010 - THORNTON JAMES E, et al
  • [X] SYSTEMS-COMPUTERS-CONTROLS, vol. 14, no. 5, September-October 1983, pages 88-96, Silver Spring, Maryland, US; K. TAMARU et al.: "Control method of instruction handling in a microprocessor having multiple execution units"

Designated contracting state (EPC)

DE FR GB

DOCDB simple family (publication)

EP 0312764 A2 19890426; EP 0312764 A3 19910410; JP H01142831 A 19890605; US 5133077 A 19920721

DOCDB simple family (application)

EP 88114878 A 19880912; JP 25962888 A 19881017; US 53400490 A 19900605