EP 0410063 B1 19960320 - Differential cascode current switch (DCCS) logic circuit family with input diodes
Title (en)
Differential cascode current switch (DCCS) logic circuit family with input diodes
Title (de)
Familie logischer Schaltkreise, bestehend aus einem kaskodierten Differentialstromschalter mit Eingangsdioden
Title (fr)
Famille logique de circuit commutateur de courant cascode différentiel avec diodes à l'entrée
Publication
Application
Priority
EP 89480114 A 19890726
Abstract (en)
[origin: EP0410063A1] The present logic circuit family is derived from the conventional DCCS logic circuit family. The logic circuit shown in the attached drawing is a six-input AND/NAND. It includes: a logic tree (41) comprised of bottom, middle, and top stages (44, 45, 46) cascoded and dotted at the tree output nodes (OUT, OUT) to perform a determined logic function (F, F). The top stage (46) includes a current switch (49) formed by a pair of input transistors (TX431, TX432) connected in a differential amplifier configuration. The base of one input transistor (TX431) on the left side of the tree is connected to the output of an AND gate, which consists of input diodes (D431, D432, ...) and resistor (RD41). True (IN PHASE) logic input signals (Z41, Z42, ...) are ANDed in this AND gate and a first elementary output signal, is available at the common emitter node (CN43) of the said differential pair. On the right side, additional input transistors (TX433, ...) are paralleled with the other input transistor (TX432) of the differential pair, so that the complementary (OUT OF PHASE) input signals (Z41, Z42, ...) that drive the transistors, are ORed to deliver a second elementary output signal, complementary to said first elementary output signal, on said common emitter node (CN43). Same principle applies at the the first and second levels to build the bottom (44) and middle (45) stages. The present invention allows to increase the number of logical inputs to be applied to a DCCS logic circuit, and in turn, the number of logic functions performed in the logic DCCS tree. As a result, an extended library of DCCS logic circuits may be obtained.
IPC 1-7
IPC 8 full level
H03K 3/286 (2006.01); H03K 19/086 (2006.01); H03K 19/173 (2006.01); H03K 19/21 (2006.01); H03M 1/74 (2006.01)
CPC (source: EP US)
H03K 19/1738 (2013.01 - EP US)
Citation (examination)
US 4760289 A 19880726 - EICHELBERGER EDWARD B [US], et al
Designated contracting state (EPC)
DE FR GB
DOCDB simple family (publication)
EP 0410063 A1 19910130; EP 0410063 B1 19960320; DE 68926045 D1 19960425; DE 68926045 T2 19961002; JP H0365818 A 19910320; JP H0736520 B2 19950419; US 5075574 A 19911224
DOCDB simple family (application)
EP 89480114 A 19890726; DE 68926045 T 19890726; JP 19088390 A 19900720; US 54111290 A 19900620