Global Patent Index - EP 0458169 A3

EP 0458169 A3 19930203 - DRIVE CIRCUIT FOR ACTIVE MATRIX TYPE LIQUID CRYSTAL DISPLAY DEVICE

Title (en)

DRIVE CIRCUIT FOR ACTIVE MATRIX TYPE LIQUID CRYSTAL DISPLAY DEVICE

Publication

EP 0458169 A3 19930203 (EN)

Application

EP 91107810 A 19910514

Priority

  • JP 5209091 A 19910318
  • JP 12305690 A 19900515

Abstract (en)

[origin: EP0458169A2] In the drive circuit of an active matrix type liquid crystal display device of this invention, the digital video signal having m-bit gray-scale is inputted to the serial parallel converter (1) and converted to the parallel video data corresponding to one line, and the (m-1) bit gray-scale data excluding the least significant bit is outputted to adders (121, 122, ..., 12n). During the first period, this (m-1) bit gray-scale data is supplied to decoders (21, 22, ..., 2n), from the adders (121, 122, ..., 12n), and during the second period, the least significant bit is added to this (m-1) bit gray-scale data at adders in accordance with the lest significant bit of the video data and supplied to decoders (21, 22, ..., 2n), respectively. In the voltage selector (31, 32, ..., 3n), with the output from decoders (121, 122, ..., 12n), the voltage having the level corresponding to the output is selected and outputted. In the display with a certain gray-scale, a voltage is outputted from the voltage selector during the first and second periods and in other gray-scale close to this gray-scale, voltages having varying adjoining levels are outputted alternately from the voltage selector (31, 32, ..., 3n) during the first and second periods. <IMAGE>

IPC 1-7

G09G 3/36; H04N 3/12

IPC 8 full level

G09G 3/36 (2006.01); G09G 3/20 (2006.01)

CPC (source: EP KR)

G09G 3/36 (2013.01 - KR); G09G 3/3688 (2013.01 - EP); G09G 3/2011 (2013.01 - EP); G09G 3/2018 (2013.01 - EP); G09G 3/3614 (2013.01 - EP); G09G 2310/027 (2013.01 - EP)

Citation (search report)

  • [X] US 4921334 A 19900501 - AKODES BORIS A [US]
  • [Y] GB 2164190 A 19860312 - CASIO COMPUTER CO LTD
  • [Y] EP 0015319 A2 19800917 - IBM [US]
  • [Y] OHWADA J.-I., ET AL.: "PRIPHERAL CIRCUIT INTEGRATED POLY-SI TFT LCD WITH GRAY SCALE REPRESENTATION.", PROCEEDINGS OF THE SOCIETY OF INFORMATION DISPLAY, SOCIETY FOR INFORMATION DISPLAY. PLAYA DEL REY, CA., US, vol. 30., no. 02., 1 January 1989 (1989-01-01), US, pages 131 - 136., XP000114035

Designated contracting state (EPC)

DE FR GB

DOCDB simple family (publication)

EP 0458169 A2 19911127; EP 0458169 A3 19930203; KR 910020627 A 19911220; KR 940005242 B1 19940615

DOCDB simple family (application)

EP 91107810 A 19910514; KR 910008017 A 19910515