EP 0491427 A3 19930317 - MEMORY ELEMENT WITH HIGH METASTABILITY-IMMUNITY
Title (en)
MEMORY ELEMENT WITH HIGH METASTABILITY-IMMUNITY
Publication
Application
Priority
US 63009590 A 19901219
Abstract (en)
[origin: EP0491427A2] In a memory element comprising interconnected logic gates (30a, 32a, 34a, 36a; 30b, 32b,34b, 36b) with field effect transistor metastable states are to be avoided. The device's immunity against staying in metastable states is considerably raised by coupling a supply terminal (10a; 10b) of each logic gate to a power supply voltage (16) via a base-emitter path of a bipolar transistor (14a; 14b) that has its collector coupled to the logic gate's output (8a; 8b). <IMAGE>
IPC 1-7
IPC 8 full level
G11C 11/417 (2006.01); G11C 11/40 (2006.01); G11C 11/41 (2006.01); H03K 19/08 (2006.01)
CPC (source: EP KR US)
G11C 11/40 (2013.01 - EP KR US); G11C 11/41 (2013.01 - EP US)
Citation (search report)
- [A] US 4779014 A 19881018 - MASUOKA FUJIO [JP], et al
- [A] US 4829201 A 19890509 - MASUDA IKURO [JP], et al
- [A] US 4804869 A 19890214 - MASUDA MASAMI [JP], et al
Designated contracting state (EPC)
DE FR GB IT NL
DOCDB simple family (publication)
EP 0491427 A2 19920624; EP 0491427 A3 19930317; EP 0491427 B1 19980415; DE 69129262 D1 19980520; DE 69129262 T2 19981105; JP H05217382 A 19930827; KR 100228839 B1 19991101; KR 920013451 A 19920729; US 5128562 A 19920707
DOCDB simple family (application)
EP 91203250 A 19911211; DE 69129262 T 19911211; JP 33101791 A 19911216; KR 910023072 A 19911216; US 63009590 A 19901219