Title (en)

METHOD FOR PRINTED CIRCUIT BOARD PATTERN MAKING USING SELECTIVELY ETCHABLE METAL LAYERS

Publication

EP 0497925 A4 19930317 (EN)

Application

EP 91907772 A 19910326

Priority

• US 57284990 A 19900824
• US 9102026 W 19910326

Abstract (en)

[origin: US5017271A] The present invention provides a method for producing high density electronic circuit boards comprising the steps of depositing a layer of a first metal upon a layer of foil to produce a composite then attaching the composite to an insulative support to produce a laminate. The layer of foil is then removed from the layer of first metal. Photoresist is then applied to the layer of first metal, exposed and developed. During the development of the photoresist portions of the photoresist are removed from the layer of first metal. A layer of third metal is then plated upon the portions of the layer of first metal that are not covered by the photoresist. All remaining photoresist and the portions of the layer of first metal which are not covered by the third metal are then removed producing a finished fine-line pattern having conductive and insulative areas. The finished fine-line pattern may then be utilized to produce a circuit board.

IPC 1-7

C25D 5/02; B05D 3/04; B05D 5/10

IPC 8 full level

C25D 7/00 (2006.01); C23F 1/02 (2006.01); H05K 3/00 (2006.01); H05K 3/02 (2006.01); H05K 3/06 (2006.01); H05K 3/10 (2006.01); H05K 3/24 (2006.01)

CPC (source: EP KR US)

C23F 1/02 (2013.01 - EP KR US); H05K 3/025 (2013.01 - EP KR US); H05K 3/108 (2013.01 - EP KR US); H05K 2203/0152 (2013.01 - EP KR US); H05K 2203/0376 (2013.01 - EP KR US); H05K 2203/0726 (2013.01 - EP KR US); H05K 2203/0793 (2013.01 - EP KR US)

Citation (search report)

• [Y] US 3984598 A 19761005 - SARAZIN RICHARD G, et al
• [A] FR 1156419 A 19580516 - THOMSON HOUSTON COMP FRANCAISE
• [Y] "ADDITIVE PLATING ON CHROMIUM FOR CIRCUITIZING NON-EPOXY SUBSTRATES.", IBM TECHNICAL DISCLOSURE BULLETIN, INTERNATIONAL BUSINESS MACHINES CORP. (THORNWOOD), US, vol. 32., no. 06B., 1 November 1989 (1989-11-01), US, pages 326/327., XP000073836, ISSN: 0018-8689
• [Y] PATENT ABSTRACTS OF JAPAN vol. 013, no. 371 (E-807)17 August 1989 & JP-A-11 24 286 ( HITACHI CHEM CO LTD ) 17 May 1989
• [Y] US-E-RE29820 (KONICEK)
• [A] PATENT ABSTRACTS OF JAPAN vol. 013, no. 181 (E-750)27 April 1989 & JP-A-10 08 694 ( HITACHI CHEM CO LTD ) 12 January 1989
• [A] ELECTRONIC DESIGN vol. 28, no. 5, March 1980, HASBROUCK HEIGHTS, NEW JERSEY US page 26 'Electroprocessing shrinks line widths cleanly in microcircuits'
• See references of WO 9203599A1

Designated contracting state (EPC)

BE DE FR GB IT SE

DOCDB simple family (publication)

US 5017271 A 19910521; AU 649666 B2 19940602; AU 7653791 A 19920317; BR 9105877 A 19921117; DE 69121183 D1 19960905; DE 69121183 T2 19961205; EP 0497925 A1 19920812; EP 0497925 A4 19930317; EP 0497925 B1 19960731; FI 921810 A0 19920423; FI 921810 A 19920423; HU 208715 B 19931228; HU T62042 A 19930329; JP H05504658 A 19930715; KR 920702440 A 19920904; WO 9203599 A1 19920305

DOCDB simple family (application)

US 57284990 A 19900824; AU 7653791 A 19910326; BR 9105877 A 19910326; DE 69121183 T 19910326; EP 91907772 A 19910326; FI 921810 A 19920423; HU 137692 A 19910326; JP 50736491 A 19910326; KR 920700956 A 19920424; US 9102026 W 19910326