Global Patent Index - EP 0522552 A3

EP 0522552 A3 19930901 - CHARGE TRANSFER DEVICE

Title (en)

CHARGE TRANSFER DEVICE

Publication

EP 0522552 A3 19930901 (EN)

Application

EP 92111682 A 19920709

Priority

  • JP 17263391 A 19910712
  • JP 17263491 A 19910712

Abstract (en)

[origin: EP0522552A2] In a CCD element, the influence of a parasitic capacitance existing between a floating diffusion region and a reset gate section of an output section is suppressed to increase sensitivity. In a CCD element in which a floating diffusion region (7) is connected to the final stage of a charge transfer register (1) having a CCD structure through a horizontal output gate section (5) and a reset gate section (11) is disposed between the floating diffusion region (7) and a reset drain region (10), an output gate pulse ( phi HOG) having an anti-phase of a reset pulse ( phi RG) applied to the reset gate section (11) is applied to the horizontal output gate section (5). Further, an output waveform in a signal period in a CCD linear sensor can be made flat and a signal level difference between odd-numbered and even-numbered pixels can be improved. In a CCD linear sensor comprising a photo sensing region formed of a plurality of photo sensing elements (pixels), first and second horizontal transfer registers disposed at both sides of the photo sensing region through read-out gate sections, a floating diffusion region for alternately detecting signal charges transferred thereto from the first and second horizontal transfer registers as output signals and a reset gate section, a transfer section of the final stage portion of the first and second horizontal transfer registers is separated and phases of drive pulses ( phi H1'), ( phi H2') applied to the transfer section of the final stage portion are shifted from those of drive pulses ( phi H1), ( phi H2) applied to the preceding transfer section, whereby a noise component (36) is superimposed upon the output waveform of ON period (TR) of the reset gate section. <IMAGE>

IPC 1-7

H04N 3/15; H01L 27/148

IPC 8 full level

G11C 27/04 (2006.01); H01L 27/148 (2006.01); H04N 5/335 (2011.01); H04N 5/341 (2011.01); H04N 5/372 (2011.01)

CPC (source: EP KR US)

H01L 27/148 (2013.01 - KR); H01L 27/14831 (2013.01 - EP US); H04N 25/00 (2023.01 - EP US); H04N 25/701 (2023.01 - EP US); H04N 25/713 (2023.01 - EP US); H04N 25/745 (2023.01 - EP KR US)

Citation (search report)

  • [X] EP 0140292 A1 19850508 - TOSHIBA KK [JP]
  • [A] IEEE TRANSACTIONS ON CONSUMER ELECTRONICS vol. 36, no. 3, August 1990, NEW YORK US pages 473 - 477 HIRAMA ET AL. 'A 5000-PIXEL LINEAR IMAGE SENSOR WITH ON-CHIP CLOCK DRIVERS'

Designated contracting state (EPC)

DE FR GB

DOCDB simple family (publication)

EP 0522552 A2 19930113; EP 0522552 A3 19930901; EP 0522552 B1 19980107; DE 69223864 D1 19980212; DE 69223864 T2 19980806; DE 69228838 D1 19990506; DE 69228838 T2 19991021; EP 0766455 A2 19970402; EP 0766455 A3 19970723; EP 0766455 B1 19990331; KR 100247827 B1 20000315; KR 930003409 A 19930224; US 5199053 A 19930330

DOCDB simple family (application)

EP 92111682 A 19920709; DE 69223864 T 19920709; DE 69228838 T 19920709; EP 96119886 A 19920709; KR 920012334 A 19920711; US 91193692 A 19920710