EP 0524014 B1 19971015 - CPU Malfunction detection system
Title (en)
CPU Malfunction detection system
Title (de)
CPU-Fehlerdetektionssystem
Title (fr)
Système de détection du mauvais fonctionnement de CPU
Publication
Application
Priority
JP 20326491 A 19910719
Abstract (en)
[origin: EP0524014A2] A system for detecting the malfunction of a CPU (Central Processing Unit) is disclosed. A watchdog timer applies an interrupt signal to the CPU on detecting the malfunction of the CPU. In response to the interrupt signal, the CPU executes interrupt processing to increment the number of times that the CPU has malfunctioned stored in a nonvolatile memory. As the number of times stored in the nonvolatile memory reaches a predetermined value, the CPU displays an alarm message on a display. <IMAGE>
IPC 1-7
IPC 8 full level
G06F 11/30 (2006.01); G06F 11/00 (2006.01); G06F 11/32 (2006.01)
CPC (source: EP KR US)
G06F 11/00 (2013.01 - KR); G06F 11/076 (2013.01 - EP US); G06F 11/0757 (2013.01 - EP US); G06F 11/327 (2013.01 - EP US)
Designated contracting state (EPC)
DE GB IT SE
DOCDB simple family (publication)
EP 0524014 A2 19930120; EP 0524014 A3 19940323; EP 0524014 B1 19971015; AU 2041492 A 19930121; AU 661493 B2 19950727; CA 2074103 A1 19930120; DE 69222705 D1 19971120; DE 69222705 T2 19980326; JP 2758742 B2 19980528; JP H0528005 A 19930205; KR 930002937 A 19930223; US 5398332 A 19950314
DOCDB simple family (application)
EP 92306579 A 19920717; AU 2041492 A 19920720; CA 2074103 A 19920717; DE 69222705 T 19920717; JP 20326491 A 19910719; KR 920012803 A 19920718; US 91445492 A 19920717