EP 0527194 A4 19930414 - HIGH DENSITY LOCAL INTERCONNECT IN A SEMICONDUCTOR CIRCUIT USING METAL SILICIDE
Title (en)
HIGH DENSITY LOCAL INTERCONNECT IN A SEMICONDUCTOR CIRCUIT USING METAL SILICIDE
Publication
Application
Priority
US 51801690 A 19900502
Abstract (en)
[origin: WO9117576A1] A metal silicide layer (82) in or on a body of silicon wafer (10) is used for interconnecting two or more CMOS circuit devices (50, 52). In addition to a polysilicon layer (42, 44, 46) and a metal layer (96), the metal silicide layer (82) provides an additional layer of local interconnect which can be performed at high density to reduce the size of the die while including the same number of circuit devices. An amorphous silicon layer (64) doped at selected regions (72a-72b, 72c-72d, 74a-74b) is used to connect the silicide layer to the source and drain regions of the devices (50, 52).
IPC 1-7
H01L 45/00; H01L 27/02; H01L 29/04; H01L 23/48; H01L 21/44; H01L 21/265
IPC 8 full level
H01L 21/768 (2006.01); H01L 23/532 (2006.01)
CPC (source: EP)
H01L 21/76889 (2013.01); H01L 21/76895 (2013.01); H01L 23/53271 (2013.01); H01L 2924/0002 (2013.01)
Citation (search report)
- [A] EP 0163132 A1 19851204 - TOSHIBA KK [JP]
- See references of WO 9117576A1
Designated contracting state (EPC)
AT CH DE FR GB LI NL
DOCDB simple family (publication)
WO 9117576 A1 19911114; EP 0527194 A1 19930217; EP 0527194 A4 19930414
DOCDB simple family (application)
US 9102872 W 19910425; EP 91909507 A 19910425