EP 0527366 B1 19950927 - Variable delay circuit.
Title (en)
Variable delay circuit.
Title (de)
Variable Verzögerungsschaltung.
Title (fr)
Circuit de retardement variable.
Publication
Application
Priority
JP 19211091 A 19910731
Abstract (en)
[origin: EP0527366A1] A plurality of delay stages (21) are connected in cascade, each delay stage having a construction in which either one of a path of a delay element (17) utilizing the propagation delay of a gate array and a path (18) not passing through the delay element is selected by a path selector (19). Each bit of control data is used to control the path selector of the corresponding delay stages. Composite delays are measured for all combinations of such paths, control data (DC) which provides a measured composite delay closest to an intended delay corresponding to each set data (DL) is determined and is prestored in a main conversion table (22). A prediction is made, through calculation, as to a delay for each control data when ambient temperature rises INCREMENT T DEG C from a temperature TO at which the main conversion table was produced, the thus predicted delay is used to determine control data which provides a predicted delay closest to an intended delay for each set data, and the relationship between the control data and the set data is prestored in a corrected conversion table (31, 32). Ambient temperature is detected by temperature detection/control circuit (36). When the difference INCREMENT t between the detected temperature and the temperature tO is INCREMENT t < INCREMENT T DEG C, control data of the main conversion table is selected by a data selector (35) and the path selector of each delay stage is controlled accordingly. When INCREMENT t >/= INCREMENT T DEG C, control data of the corrected conversion table is selected, and the path selector of each delay stage is controlled accordingly. <IMAGE>
IPC 1-7
IPC 8 full level
G01R 31/319 (2006.01); H03K 5/133 (2014.01); H03K 5/14 (2014.01); H03K 5/00 (2006.01)
CPC (source: EP KR US)
G01R 31/28 (2013.01 - KR); G01R 31/3191 (2013.01 - EP US); G01R 31/31922 (2013.01 - EP US); H03K 5/131 (2013.01 - EP US); G01R 31/31926 (2013.01 - EP US); H03K 2005/00104 (2013.01 - EP US); H03K 2005/00143 (2013.01 - EP US)
Designated contracting state (EPC)
DE
DOCDB simple family (publication)
EP 0527366 A1 19930217; EP 0527366 B1 19950927; DE 69205101 D1 19951102; DE 69205101 T2 19960530; JP 2731875 B2 19980325; JP H0537316 A 19930212; KR 930002839 A 19930223; KR 960003992 B1 19960325; US 5204564 A 19930420
DOCDB simple family (application)
EP 92112549 A 19920722; DE 69205101 T 19920722; JP 19211091 A 19910731; KR 920012292 A 19920710; US 91667292 A 19920722