Global Patent Index - EP 0652682 A3

EP 0652682 A3 19970409 - Circuit for determining the occurrence of control signals sent to a microprocessor system.

Title (en)

Circuit for determining the occurrence of control signals sent to a microprocessor system.

Title (de)

Schaltungsanordnung zum Bestimmen der Auftrittszeitpunkte von einer Mikroprozessoranordnung zugeführten Steuersignalen.

Title (fr)

Circuit pour déterminer l'occurrence de signaux de commande émis vers un système à micro-processeur.

Publication

EP 0652682 A3 19970409 (DE)

Application

EP 94112146 A 19940803

Priority

DE 4329153 A 19930830

Abstract (en)

[origin: DE4329153C1] The times of occurrence of control signals which are fed to a microprocessor (MP) as interrupt signals are determined using the momentary counter states of a cycle counter device (C0) which is connected to a bus system (ADR, DB, ST) of this microprocessor. In interrupt-free counting operation, their momentary counter state is established by a read command which is output on an interrupt and taken over by the microprocessor. A second counter device (C1) is provided, and is only controlled into a counting cycle when a control signal occurs. The momentary counter state of this counter device is also established when a read command occurs and taken over by the microprocessor. The time of occurrence of the control signal is determined from the difference between the two simultaneously established momentary counter states. <IMAGE>

IPC 1-7

H04Q 11/04; G06F 13/00

IPC 8 full level

G06F 1/12 (2006.01); G06F 9/48 (2006.01); H04L 7/02 (2006.01); H04Q 11/04 (2006.01); H04L 12/70 (2013.01)

CPC (source: EP US)

H04L 7/02 (2013.01 - EP US); H04Q 11/0478 (2013.01 - EP US); H04L 2012/5616 (2013.01 - EP US); H04L 2012/5674 (2013.01 - EP US)

Citation (search report)

  • [X] PATENT ABSTRACTS OF JAPAN vol. 015, no. 180 (P - 1199) 9 May 1991 (1991-05-09)
  • [A] PATENT ABSTRACTS OF JAPAN vol. 008, no. 277 (E - 285) 18 December 1984 (1984-12-18)
  • [A] G.N. REVANKAR ET AL.: "A microprocessor-based high-accuracy speed measurement system", J. INSTN. ELECTRONICS & TELECOM. ENGRS, vol. 30, no. 3, 1984, pages 62 - 65, XP000617107
  • [A] T. FOURCROY: "Flexible timing rounds out uC's peripheral support", ELECTRONIC DESIGN, 22 December 1983 (1983-12-22), pages 149 - 153, XP000616757

Designated contracting state (EPC)

AT BE CH FR GB IT LI NL SE

DOCDB simple family (publication)

DE 4329153 C1 19941110; EP 0652682 A2 19950510; EP 0652682 A3 19970409; JP H0784669 A 19950331; US 5483648 A 19960109

DOCDB simple family (application)

DE 4329153 A 19930830; EP 94112146 A 19940803; JP 20508094 A 19940830; US 29204194 A 19940818