EP 0782319 B1 20021016 - Apparatus for symmetrically reducing "N" least significant bits of an M-Bit digital signal
Title (en)
Apparatus for symmetrically reducing "N" least significant bits of an M-Bit digital signal
Title (de)
Gerät zur symmetrischen Reduktion von "N" LSBs eines digitalen M-Bit-Signals
Title (fr)
Appareil pour réduire symétriquement "N" LSBs d'un signal numérique de M bits
Publication
Application
Priority
US 58111595 A 19951229
Abstract (en)
[origin: EP0782319A2] An M-bit digital signal, the MSB thereof and an integer K are added to produce a sum which is truncated by N least significant bits to provide a symmetrically rounded bit-reduced digital output signal. The MSB may be applied in true or complemented form to the adder for selecting wide or narrow rounding modes having different numbers of output zeros disposed about a point of symmetry for a given input signal change. Advantageously, undesirable DC shifts due to least significant bit (LSB) reduction in digital video, audio or similar applications are prevented. <IMAGE>
IPC 1-7
IPC 8 full level
G06F 7/38 (2006.01); G06F 7/48 (2006.01); H03M 7/30 (2006.01); H04N 9/64 (2006.01); H04N 9/78 (2006.01); H04N 11/04 (2006.01)
CPC (source: EP KR US)
G06F 7/48 (2013.01 - EP KR US); G06F 7/49921 (2013.01 - EP US); G06F 7/49963 (2013.01 - EP US)
Designated contracting state (EPC)
DE FR GB IT
DOCDB simple family (publication)
EP 0782319 A2 19970702; EP 0782319 A3 19980107; EP 0782319 B1 20021016; CN 1095113 C 20021127; CN 1156279 A 19970806; DE 69624329 D1 20021121; DE 69624329 T2 20030220; JP 3762011 B2 20060329; JP H09288563 A 19971104; KR 100462447 B1 20050511; KR 970049442 A 19970729; MX 9700196 A 19971231; US 5696710 A 19971209
DOCDB simple family (application)
EP 96120341 A 19961218; CN 96116750 A 19961228; DE 69624329 T 19961218; JP 34890596 A 19961226; KR 19960072709 A 19961227; MX 9700196 A 19970107; US 58111595 A 19951229