Global Patent Index - EP 0788058 A1

EP 0788058 A1 19970806 - A low power data processing system for interfacing with an external device and method therefor

Title (en)

A low power data processing system for interfacing with an external device and method therefor

Title (de)

Datenverarbeitungssystem mit geringem Verbrauch zur Schnittstellenbildung mit einem externen Gerät und Verfahren dafür

Title (fr)

Système de traitement de données à faible consommation pour faire l'interfaçage à un dispositif externe et procédé associé

Publication

EP 0788058 A1 19970806 (EN)

Application

EP 97101188 A 19970127

Priority

US 59883396 A 19960205

Abstract (en)

A data processor (10) flexibly interfaces with both a variety of memory devices and external peripheral devices. A control register (94) is provided for dynamically controlling an electrical interface configuration of the data processor. A set of bits (DA) in the control register (94) provides configuration control which indicates a voltage level of data communicated with the data processor. <IMAGE>

IPC 1-7

G06F 13/40; G06F 1/32

IPC 8 full level

G06F 1/32 (2006.01); G06F 3/00 (2006.01); G06F 13/40 (2006.01)

CPC (source: EP KR US)

G06F 1/32 (2013.01 - EP US); G06F 13/00 (2013.01 - KR); G06F 13/4068 (2013.01 - EP US); Y02D 10/00 (2017.12 - EP US)

Citation (search report)

  • [A] US 5387809 A 19950207 - YAMAGISHI MIKIO [JP], et al
  • [A] PATENT ABSTRACTS OF JAPAN vol. 16, no. 483 (P - 1432) 7 October 1992 (1992-10-07)

Designated contracting state (EPC)

DE FR GB IT

DOCDB simple family (publication)

EP 0788058 A1 19970806; JP H09230970 A 19970905; KR 100439089 B1 20041028; KR 970062925 A 19970912; US 5787291 A 19980728; US 5951688 A 19990914; US 6119240 A 20000912

DOCDB simple family (application)

EP 97101188 A 19970127; JP 3446397 A 19970203; KR 19970000952 A 19970115; US 2460798 A 19980217; US 32138999 A 19990527; US 59883396 A 19960205