EP 0805482 A1 19971105 - Semiconductor processing
Title (en)
Semiconductor processing
Title (de)
Halbleiterherstellung
Title (fr)
Traitement de semi-conducteurs
Publication
Application
Priority
US 64463496 A 19960430
Abstract (en)
A method is provided for increasing the electrical activation of dopants in a semiconductor device using rapid thermal processing (RTP). An aspect of the invention includes forming a gate on a semiconductor body (12), such as a substrate (14), and implanting a dopant (28) into the semiconductor body (12) proximate the gate. The dopant (28) is partially activated using a furnace. The dopant (28) is further activated using RTP. The activation of the dopant (28) through RTP in addition to the furnace annealing allows almost complete activation of the dopant while maintaining acceptable channel depths. <IMAGE>
IPC 1-7
IPC 8 full level
H01L 21/265 (2006.01); H01L 21/336 (2006.01); H01L 29/78 (2006.01)
CPC (source: EP US)
H01L 21/2652 (2013.01 - EP US); H01L 29/6656 (2013.01 - EP US); H01L 29/6659 (2013.01 - EP US); H01L 21/2658 (2013.01 - EP US)
Citation (search report)
- [X] US 5169796 A 19921208 - MURRAY ROGER [US], et al
- [X] EP 0575099 A1 19931222 - AMERICAN TELEPHONE & TELEGRAPH [US]
- [X] N. KASAI ET AL.: "0.25 micron CMOS Technology using P+ Polysilicon Gate PMOSFET", INTERNATIONAL ELECTRON DEVICES MEETING, 6 December 1987 (1987-12-06) - 9 December 1987 (1987-12-09), WASHINGTON , D.C., pages 367 - 370, XP002037698
Designated contracting state (EPC)
DE FR GB IT NL
DOCDB simple family (publication)
EP 0805482 A1 19971105; JP H1050630 A 19980220; US 5933740 A 19990803
DOCDB simple family (application)
EP 97302971 A 19970430; JP 11161997 A 19970428; US 64463496 A 19960430