EP 0806719 B1 20010801 - Circuit for generating a voltage reference
Title (en)
Circuit for generating a voltage reference
Title (de)
Schaltungsanordnung zur Erzeugung eines Referenz-potentials
Title (fr)
Circuit pour générer une tension de référence
Publication
Application
Priority
DE 19618914 A 19960510
Abstract (en)
[origin: DE19618914C1] A capacitance (C1) is formed in parallel with a resistance (R2) in the collector circuit of one transistor (T2) of a pair, the other one (T1) being connected as a diode. The collector current is drawn from a current source (T4) having its emitter connected to the output terminal (U) and its collector supplied with a constant voltage (V). The base is connected to one node of a divider chain with a resistance (R8) between complementary bipolar transistors (T6,T3) in cascode, the lower one (T3) having its base connected to the capacitance.
IPC 1-7
IPC 8 full level
CPC (source: EP US)
G05F 3/265 (2013.01 - EP US); G05F 3/30 (2013.01 - EP US)
Citation (examination)
BIRRITTELLA M S ET AL: "DESIGN TECHNIQUES FOR IC VOLTAGE REGULATORS WITHOUT P-N-P TRANSISTORS" IEEE JOURNAL OF SOLID-STATE CIRCUITS, NEW YORK, NY, US, Bd. 22, Nr. 1, Februar 1987.
Designated contracting state (EPC)
CH DE DK FR GB IT LI
DOCDB simple family (publication)
DE 19618914 C1 19970814; DE 59704169 D1 20010906; EP 0806719 A2 19971112; EP 0806719 A3 19980916; EP 0806719 B1 20010801; US 5883543 A 19990316
DOCDB simple family (application)
DE 19618914 A 19960510; DE 59704169 T 19970424; EP 97106833 A 19970424; US 85584297 A 19970512