Global Patent Index - EP 0865669 A2

EP 0865669 A2 19980923 - CMOS DEVICE

Title (en)

CMOS DEVICE

Title (de)

CMOS-ANORDNUNG

Title (fr)

DISPOSITIF CMOS

Publication

EP 0865669 A2 19980923 (DE)

Application

EP 96945730 A 19961118

Priority

  • DE 9602189 W 19961118
  • DE 19545554 A 19951206

Abstract (en)

[origin: DE19545554A1] Described is a CMOS device with at least one NMOS zone (2) and at least one PMOS zone (3) and, located on its surface, contacts (24, 34) by means of which pre-determined voltages are applied to particular areas (1, 30) of the substrate of the device. The CMOS device described is characterized in that the average number of contacts (24, 34) per unit surface area and/or the average contact area per unit surface area within the at least one NMOS zone (2) is significantly lower than within the at least one PMOS zone (3).

IPC 1-7

H01L 27/092

IPC 8 full level

H01L 21/28 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01)

CPC (source: EP KR US)

H01L 27/092 (2013.01 - KR); H01L 27/0927 (2013.01 - EP US)

Citation (search report)

See references of WO 9721240A2

Designated contracting state (EPC)

AT CH DE ES FR GB IT LI

DOCDB simple family (publication)

DE 19545554 A1 19970612; CN 1207829 A 19990210; CN 1230903 C 20051207; EP 0865669 A2 19980923; IN 190506 B 20030802; JP 2000501247 A 20000202; JP 3357069 B2 20021216; KR 100415129 B1 20040413; KR 19990071877 A 19990927; RU 2170475 C2 20010710; UA 56148 C2 20030515; US 6160295 A 20001212; WO 9721240 A2 19970612; WO 9721240 A3 19970731

DOCDB simple family (application)

DE 19545554 A 19951206; CN 96199786 A 19961118; DE 9602189 W 19961118; EP 96945730 A 19961118; IN 2071CA1996 A 19961202; JP 52084597 A 19961118; KR 19980704162 A 19980603; RU 98112593 A 19961118; UA 98062924 A 19961118; US 9115298 A 19980902