EP 0881778 A2 19981202 - Ternary signal input circuit
Title (en)
Ternary signal input circuit
Title (de)
Schaltung mit ternärem Eingang
Title (fr)
Circuit à entrée ternaire
Publication
Application
Priority
JP 14169697 A 19970530
Abstract (en)
A ternary signal input circuit includes two inverters having opposite hysteresis characteristics, respectively, a NOR gate for producing an output signal indicative of an inversion of the logical sum of output signals from the inverters, and a AND gate for producing an output signal indicative of the logical product of output signals from the inverters. The ternary signal input circuit, composed only of digital components, converts a ternary signal supplied through a transformer into binary signals and outputs the binary signals. The ternary signal input circuit has a relatively simple circuit arrangement and will take up a relatively small area on an LSI chip when it is incorporated into the LSI chip. <IMAGE>
IPC 1-7
IPC 8 full level
H03M 5/16 (2006.01); H04L 25/49 (2006.01)
CPC (source: EP US)
H03M 5/16 (2013.01 - EP US)
Designated contracting state (EPC)
DE FR GB
DOCDB simple family (publication)
EP 0881778 A2 19981202; EP 0881778 A3 20000510; JP 3288259 B2 20020604; JP H10336036 A 19981218; US 6040709 A 20000321
DOCDB simple family (application)
EP 98109783 A 19980528; JP 14169697 A 19970530; US 8256198 A 19980521