Global Patent Index - EP 0886200 A3

EP 0886200 A3 2000-03-29 - Circuit arrangement for generating a load-independent DC voltage

Title (en)

Circuit arrangement for generating a load-independent DC voltage

Title (de)

Schaltungsanordnung zur Erzeugung einer lastunabhängigen Gleichspannung

Title (fr)

Circuit pour générer une tension continue indépendante de la charge

Publication

EP 0886200 A3 (DE)

Application

EP 98110544 A

Priority

DE 19725842 A

Abstract (en)

[origin: EP0886200A2] The circuit arrangement includes a first rectifier arrangement (GL1) with an AC voltage connection (EK1, EK2) and two output terminals (AK1, AK2), and a current regulator arrangement (SRA) connected to the output terminals of the first rectifier arrangement. A second rectifier arrangement is connected to two output terminals (AK3, AK4) of the current regulator arrangement, which provides an output voltage (Ua) at two output terminals (AK5, AK6). A voltage measurement arrangement (MA) is connected to the output terminals of the second rectifier arrangement to provide a voltage signal (SS) at its output. A feedback branch includes a regulator arrangement (RA) with an integrator arrangement (IN) for feeding the voltage signal to an input terminal (EK) of the current regulation arrangement. A function generator is arranged in the feedback branch in connection to the regulator arrangement. The function generator provides an output signal (y) from an input signal (x), according to a predetermined function (y=f (x) ), whereby the functions increases at least partially with increasing input signal.

IPC 1-7 (main, further and additional classification)

G05F 1/613; H02M 1/00

IPC 8 full level (invention and additional information)

H02M 7/217 (2006.01); G05F 1/10 (2006.01); G05F 1/56 (2006.01); G05F 1/613 (2006.01); H02M 3/155 (2006.01); H02M 7/12 (2006.01)

CPC (invention and additional information)

G05F 1/613 (2013.01)

Citation (search report)

Designated contracting state (EPC)

AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

EPO simple patent family

EP 0886200 A2 19981223; EP 0886200 A3 20000329; EP 0886200 B1 20020502; DE 19725842 A1 19990107; DE 19725842 C2 19990422; JP 3538320 B2 20040614; JP H1155939 A 19990226; US 6069470 A 20000530

INPADOC legal status


2016-10-31 [PGFP IT] POSTGRANT: ANNUAL FEES PAID TO NATIONAL OFFICE

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2003-04-23 [26N] NO OPPOSITION FILED

- Effective date: 20030204

2003-01-10 [EN] FR: TRANSLATION NOT FILED

2003-01-08 [REG IE FD4D] EUROPEAN PATENTS DESIGNATING IRELAND TREATED AS ALWAYS HAVING BEEN VOID

- Document: IE 0886200E

2002-10-30 [GBV] GB: EP PATENT (UK) TREATED AS ALWAYS HAVING BEEN VOID IN ACCORDANCE WITH GB SECTION 77(7)/1977

- Effective date: 20020502

2002-06-12 [REG IE FG4D] EUROPEAN PATENTS GRANTED DESIGNATING IRELAND

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2002-06-06 [REF] CORRESPONDS TO:

- Document: DE 59803965 20020606

2002-05-08 [REG GB FG4D] EUROPEAN PATENT GRANTED

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2002-05-02 [AK] DESIGNATED CONTRACTING STATES:

- Kind Code of Ref Document: B1

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2002-05-02 [PG25 FR] LAPSED IN A CONTRACTING STATE ANNOUNCED VIA POSTGRANT INFORM. FROM NAT. OFFICE TO EPO

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2002-01-01 [REG GB IF02] EUROPEAN PATENT IN FORCE AS OF 2002-01-01

2001-11-14 [17Q] FIRST EXAMINATION REPORT

- Effective date: 20011002

2001-09-19 [RAP1] TRANSFER OF RIGHTS OF AN EP PUBLISHED APPLICATION

- Owner name: INFINEON TECHNOLOGIES AG

2000-12-06 [AKX] PAYMENT OF DESIGNATION FEES

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2000-06-28 [17P] REQUEST FOR EXAMINATION FILED

- Effective date: 20000503

2000-03-29 [AK] DESIGNATED CONTRACTING STATES:

- Kind Code of Ref Document: A3

- Designated State(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

2000-03-29 [AX] REQUEST FOR EXTENSION OF THE EUROPEAN PATENT TO

- Free text: AL;LT;LV;MK;RO;SI

2000-03-29 [RIC1] CLASSIFICATION (CORRECTION)

- Free text: 7G 05F 1/613 A, 7H 02M 1/00 B

1998-12-23 [AK] DESIGNATED CONTRACTING STATES:

- Kind Code of Ref Document: A2

- Designated State(s): DE FR GB IE IT

1998-12-23 [AX] REQUEST FOR EXTENSION OF THE EUROPEAN PATENT TO

- Free text: AL;LT;LV;MK;RO;SI