EP 0897613 A1 19990224 - CIRCUIT ARRANGEMENT FOR GENERATING RANDOM BIT SEQUENCES
Title (en)
CIRCUIT ARRANGEMENT FOR GENERATING RANDOM BIT SEQUENCES
Title (de)
SCHALTUNGSANORDNUNG ZUM ERZEUGEN ZUFÄLLIGER BITFOLGEN
Title (fr)
MONTAGE POUR LA GENERATION DE SEQUENCES ALEATOIRES D'OCTETS
Publication
Application
Priority
- DE 9700831 W 19970425
- DE 19618098 A 19960506
Abstract (en)
[origin: DE19618098C1] A circuit arrangement for generating random bit sequences has a first oscillator (OSZ1) and a second oscillator (VCO1) whose outputs are connected to the inputs of a phase detector (PD) that generates the random bit sequence. The second oscillator (VCO1) is frequency modulated.
IPC 1-7
IPC 8 full level
G06F 7/58 (2006.01); H03B 29/00 (2006.01); H03K 3/84 (2006.01); H04L 9/22 (2006.01)
CPC (source: EP KR)
H03B 29/00 (2013.01 - EP); H03K 3/84 (2013.01 - EP KR); H04L 9/0662 (2013.01 - EP)
Citation (search report)
See references of WO 9742706A1
Designated contracting state (EPC)
AT CH DE ES FR GB IT LI
DOCDB simple family (publication)
DE 19618098 C1 19970605; BR 9708977 A 19990803; CN 1217834 A 19990526; EP 0897613 A1 19990224; JP H11509707 A 19990824; KR 20000010804 A 20000225; WO 9742706 A1 19971113
DOCDB simple family (application)
DE 19618098 A 19960506; BR 9708977 A 19970425; CN 97194365 A 19970425; DE 9700831 W 19970425; EP 97924868 A 19970425; JP 53941497 A 19970425; KR 19980708938 A 19981106