EP 0912926 B1 20120201 - UNIFIED LOAD/STORE UNIT FOR A SUPERSCALAR MICROPROCESSOR AND METHOD OF OPERATING THE SAME
Title (en)
UNIFIED LOAD/STORE UNIT FOR A SUPERSCALAR MICROPROCESSOR AND METHOD OF OPERATING THE SAME
Title (de)
VERBUNDENE LADE/SPEICHEREINHEIT FÜR EINEN SUPERSKALAREN MIKROPROZESSOR UND VERFAHREN ZUR ANWENDUNG
Title (fr)
UNITE DE CHARGEMENT/STOCKAGE UNIFIEE POUR MICROPROCESSEUR SUPERSCALAIRE, ET PROCEDE PERMETTANT DE FAIRE FONCTIONNER CETTE UNITE
Publication
Application
Priority
US 9611843 W 19960716
Abstract (en)
[origin: WO9802803A1] A load/store buffer is provided which allows both load memory operations and store memory operations to be stored within it. Because each storage location may contain either a load or a store memory operation, the number of available storage locations for load memory operations is maximally the number of storage locations in the entire buffer. Similarly, the number of available storage locations for store memory operations is maximally the number of storage locations in the entire buffer. This invention improves use of silicon area for load and store buffers by implementing, in a smaller area, a performance-equivalent alternative to the separate load and store buffer approach previously used in many superscalar microprocessors.
IPC 8 full level
CPC (source: EP)
G06F 5/065 (2013.01); G06F 9/3834 (2013.01)
Designated contracting state (EPC)
DE ES FR GB NL
DOCDB simple family (publication)
WO 9802803 A1 19980122; EP 0912926 A1 19990506; EP 0912926 B1 20120201
DOCDB simple family (application)
US 9611843 W 19960716; EP 96925346 A 19960716