Global Patent Index - EP 0922293 A4

EP 0922293 A4 19990616 -

Publication

EP 0922293 A4 19990616

Application

EP 97927842 A 19970605

Priority

  • US 9709198 W 19970605
  • US 66053696 A 19960607
  • US 66053896 A 19960607

Abstract (en)

[origin: WO9747021A1] An electron-emitter having a lower non-insulating emitter region (42), an overlying insulating layer (44), and a gate layer (48A, 60A, 60B, 120A, or 180A/184) is fabricated by a process in which particles (46) are distributed over one of the following layers: the insulating layer, the gate layer, a primary layer (50A, 62A, or 72) provided over the gate layer, a further layer (74) provided over the primary layer, or a pattern-transfer layer (182). The particles are utilized in defining gate openings (54, 66, 80, 122, or 186/188) through the gate layer. The gate openings are then variously employed in forming dielectric openings (56, 58, 80, 114, 128, 144, or 154) through the insulating layer. Electron-emissive elements that can, for example, be shaped like cones (58A or 70A) or like filaments (106B, 116B, 130A, 146A, or 156B) are formed in the dielectric openings.

IPC 1-7

H01J 9/02

IPC 8 full level

H01J 1/304 (2006.01); H01J 9/02 (2006.01)

CPC (source: EP)

H01J 9/025 (2013.01); H01J 2329/00 (2013.01)

Citation (search report)

Designated contracting state (EPC)

DE FR GB

DOCDB simple family (publication)

WO 9747021 A1 19971211; DE 69730333 D1 20040923; DE 69730333 T2 20050901; EP 0922293 A1 19990616; EP 0922293 A4 19990616; EP 0922293 B1 20040818; JP 2000512067 A 20000912; JP 4226651 B2 20090218; KR 100323289 B1 20020308; KR 20000016555 A 20000325; TW 389928 B 20000511

DOCDB simple family (application)

US 9709198 W 19970605; DE 69730333 T 19970605; EP 97927842 A 19970605; JP 50069898 A 19970605; KR 19980710145 A 19981207; TW 86107885 A 19970607