Global Patent Index - EP 0923122 B1

EP 0923122 B1 20110907 - Method of manufacturing an integrated circuit using chemical mechanical polishing and fixture for chemical mechanical polishing

Title (en)

Method of manufacturing an integrated circuit using chemical mechanical polishing and fixture for chemical mechanical polishing

Title (de)

Chemisch-mechanisches Polierverfahren zur Herstellung eines integrierten Schaltkreises und zugehörige Haltevorrichtung

Title (fr)

Procédé de polissage mécano-chimique pour la fabrication d'un circuit intégré et dispositif de fixation pour polissage mécano-chimique

Publication

EP 0923122 B1 20110907 (EN)

Application

EP 98309597 A 19981124

Priority

  • US 98210997 A 19971201
  • US 98094397 A 19971201

Abstract (en)

[origin: EP0923122A2] A method of manufacturing integrated circuits using a carrier fixture. The carrier fixture does not include transport channels or openings for directing a slurry to a substrate being polished and, as a result, damage to the substrate is reduced because the edges adjacent to the substrate are eliminated. The present invention further provides a carrier fixture having an inner support (e.g., 130) coupled to a ring member (e.g., 120) that contacts a substrate (e.g., 200) during the CMP process. The present invention also provides a carrier fixture having inner (e.g., 130) and outer supports (e.g., 125) coupled to a ring member (e.g., 120). <IMAGE>

IPC 8 full level

B24B 37/04 (2006.01); B24B 41/06 (2006.01); H01L 21/304 (2006.01); H01L 21/68 (2006.01)

CPC (source: EP KR)

B24B 37/042 (2013.01 - EP); B24B 37/32 (2013.01 - EP); H01L 21/77 (2013.01 - KR)

Designated contracting state (EPC)

DE

DOCDB simple family (publication)

EP 0923122 A2 19990616; EP 0923122 A3 19991229; EP 0923122 B1 20110907; JP H11239965 A 19990907; KR 100495717 B1 20050930; KR 19990062593 A 19990726

DOCDB simple family (application)

EP 98309597 A 19981124; JP 34087098 A 19981201; KR 19980050349 A 19981124