EP 0944173 B1 20040121 - Add-compare selection circuit for a Viterbi decoder
Title (en)
Add-compare selection circuit for a Viterbi decoder
Title (de)
Addier- Vergleichs- Auswahl- Schaltung für einen Viterbi Dekodierer
Title (fr)
Circuit d'addition-comparaison-sélection pour un décodeur de Viterbi
Publication
Application
Priority
GB 9805573 A 19980317
Abstract (en)
[origin: EP0944173A2] A high-speed add-compare selection apparatus, for a Viterbi algorithm processing apparatus having a branch metric or Euclidean calculator and a metric memory, is described. First and second previous metric values are supplied from the metric memory to first and second registers. The first previous metric value from the first register and a branch metric or Euclidean value of the present state calculated by the branch metric or Euclidean calculator are added, as are the second previous metric value from the second register and a branch metric value of the next state calculated by the branch metric calculator. The values obtained are compared and a survival metric value calculated accordingly. <IMAGE> <IMAGE>
IPC 1-7
IPC 8 full level
H03M 13/41 (2006.01)
CPC (source: EP KR US)
H03M 13/2927 (2013.01 - EP US); H03M 13/4107 (2013.01 - EP US); H04L 25/49 (2013.01 - KR)
Designated contracting state (EPC)
DE FR IT
DOCDB simple family (publication)
EP 0944173 A2 19990922; EP 0944173 A3 20000223; EP 0944173 B1 20040121; CN 1175581 C 20041110; CN 1235429 A 19991117; DE 69914241 D1 20040226; DE 69914241 T2 20041104; GB 2335578 A 19990922; GB 2335578 B 20000712; GB 9805573 D0 19980513; KR 19990076528 A 19991015; US 6529557 B1 20030304
DOCDB simple family (application)
EP 99302042 A 19990317; CN 99104106 A 19990317; DE 69914241 T 19990317; GB 9805573 A 19980317; KR 19980046726 A 19981031; US 27112699 A 19990317