EP 0957420 A3 20000329 - Clamping circuit
Title (en)
Clamping circuit
Title (de)
Klemmschaltung
Title (fr)
Circuit de verrouillage
Publication
Application
Priority
DE 19821906 A 19980515
Abstract (en)
[origin: EP0957420A2] The circuit has cross-coupled first and second transistors which switch from a normal mode to a clamp mode when the voltage of a signal delivered via an input path falls below a defined clamp voltage. A third transistor (M3) is connected in the input path (Vp) so that it is in the reverse conducting state in clamp mode and in the forward conducting state in normal mode. The third transistor is a D-MOS-FET, whose gate connector is connected to a supply voltage to switch the FET through.
IPC 1-7
IPC 8 full level
G05F 3/22 (2006.01); G11C 5/14 (2006.01); G05F 3/24 (2006.01); G05F 3/26 (2006.01)
CPC (source: EP US)
G05F 3/227 (2013.01 - EP US); G05F 3/247 (2013.01 - EP US); G05F 3/262 (2013.01 - EP US); G05F 3/267 (2013.01 - EP US)
Citation (search report)
- [A] US 5614850 A 19970325 - CORSI MARCO [US], et al
- [A] US 5436552 A 19950725 - KAJIMOTO TAKESHI [JP]
- [A] US 4764897 A 19880816 - KAMEYAMA ATUSHI [JP], et al
Designated contracting state (EPC)
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE
DOCDB simple family (publication)
EP 0957420 A2 19991117; EP 0957420 A3 20000329; EP 0957420 B1 20030416; DE 19821906 C1 20000302; DE 59905031 D1 20030522; US 6137278 A 20001024
DOCDB simple family (application)
EP 99109644 A 19990514; DE 19821906 A 19980515; DE 59905031 T 19990514; US 31342399 A 19990517