EP 0966762 A1 19991229 - As/P HYBRID nLDD JUNCTION AND MEDIUM Vdd OPERATION FOR HIGH SPEED MICROPROCESSORS
Title (en)
As/P HYBRID nLDD JUNCTION AND MEDIUM Vdd OPERATION FOR HIGH SPEED MICROPROCESSORS
Title (de)
HYBRIDER As/P-nLDD-ÜBERGANG UND MITTLERE Vdd-FUNKTIONSWEISE FÜR HOCHGESCHWINDIGKEITSMIKROPROZESSOREN
Title (fr)
JONCTION A ZONES nLDD HYBRIDES As/P AVEC FONCTIONNEMENT A TENSION D'ALIMENTATION MOYENNE POUR MICROPROCESSEURS A GRANDE VITESSE
Publication
Application
Priority
- US 9801153 W 19980121
- US 78682197 A 19970121
Abstract (en)
[origin: WO9832176A1] A method of manufacturing a semiconductor device wherein hybrid nLDD regions are formed by implanting arsenic ions and phosphorous ions in source and drain regions of a substrate. The source and drain regions are formed by implanting either arsenic or phosphorous ions.
IPC 1-7
IPC 8 full level
H01L 21/336 (2006.01); H01L 29/78 (2006.01)
CPC (source: EP)
H01L 29/6659 (2013.01); H01L 29/7836 (2013.01)
Citation (search report)
See references of WO 9832176A1
Designated contracting state (EPC)
DE FR GB NL
DOCDB simple family (publication)
DOCDB simple family (application)
US 9801153 W 19980121; EP 98904623 A 19980121