EP 0976037 A1 20000202 - SCALEABLE DOUBLE PARALLEL DIGITAL SIGNAL PROCESSOR
Title (en)
SCALEABLE DOUBLE PARALLEL DIGITAL SIGNAL PROCESSOR
Title (de)
SKALIERBARER DOPPELPARALLELER DIGITALER SIGNALPROZESSOR
Title (fr)
PROCESSEUR DE SIGNAUX NUMERIQUES ECHELONNABLES POUR TRAITEMENT PARALLELE EN DOUBLE
Publication
Application
Priority
- CA 9700164 W 19970310
- US 61333196 A 19960311
Abstract (en)
[origin: WO9734226A1] A distributed architecture parallel processing apparatus, includes a central microprocessor having at least one external interface connected to a similar interface of a neighboring parallel processor. The processors exchange data and control signals through the interfaces to cooperatively share in the execution of a program. An inter-processor status register in each processor maintains the current status of the processors.
IPC 1-7
IPC 8 full level
G06F 9/32 (2006.01); G06F 9/38 (2006.01); G06F 15/80 (2006.01)
CPC (source: EP US)
G06F 9/30036 (2013.01 - EP US); G06F 9/30094 (2013.01 - EP US); G06F 9/3879 (2013.01 - EP US); G06F 9/3881 (2013.01 - EP US); G06F 9/3885 (2013.01 - EP US); G06F 9/3887 (2013.01 - EP US); G06F 15/8015 (2013.01 - EP US)
Citation (search report)
See references of WO 9734226A1
Designated contracting state (EPC)
DE FR GB SE
DOCDB simple family (publication)
WO 9734226 A1 19970918; CA 2248711 A1 19970918; DE 69719221 D1 20030327; DE 69719221 T2 20031218; EP 0976037 A1 20000202; EP 0976037 B1 20030219; US 5960209 A 19990928
DOCDB simple family (application)
CA 9700164 W 19970310; CA 2248711 A 19970310; DE 69719221 T 19970310; EP 97904970 A 19970310; US 61333196 A 19960311