EP 0996968 A1 20000503 - METHOD AND DEVICE FOR TREATING TWO-DIMENSIONAL SUBSTRATES, ESPECIALLY SILICON SLICES (WAFERS), FOR PRODUCING MICROELECTRONIC COMPONENTS
Title (en)
METHOD AND DEVICE FOR TREATING TWO-DIMENSIONAL SUBSTRATES, ESPECIALLY SILICON SLICES (WAFERS), FOR PRODUCING MICROELECTRONIC COMPONENTS
Title (de)
VERFAHREN UND VORRICHTUNG ZUM BEHANDELN VON FLÄCHIGEN SUBSTRATEN, INSBESONDERE SILIZIUM-SCHEIBEN (WAFER) ZUR HERSTELLUNG MIKROELEKTRONISCHER BAUELEMENTE
Title (fr)
PROCEDE ET DISPOSITIF POUR LE TRAITEMENT DE SUBSTRATS PLANS, EN PARTICULIER DE PASTILLES DE SILICIUM (TRANCHES) POUR LA FABRICATION DE COMPOSANTS MICROELECTRONIQUES
Publication
Application
Priority
- DE 19730582 A 19970717
- DE 19730581 A 19970717
- EP 9804049 W 19980701
Abstract (en)
[origin: US6251551B1] The invention concerns a method and a device for treating and processing flat substrates such as silicon slices (wafers) for producing microelectronic components in vertical alignment.
IPC 1-7
IPC 8 full level
G03F 7/20 (2006.01); H01L 21/00 (2006.01); H01L 21/027 (2006.01); H01L 21/304 (2006.01); H01L 21/677 (2006.01)
CPC (source: EP US)
G03F 7/20 (2013.01 - EP US); G03F 7/7075 (2013.01 - EP US); H01L 21/67028 (2013.01 - EP US); H01L 21/67173 (2013.01 - EP US); H01L 21/67225 (2013.01 - EP US); H01L 21/67706 (2013.01 - EP US); H01L 21/67712 (2013.01 - EP US); H01L 21/67715 (2013.01 - EP US); H01L 21/67736 (2013.01 - EP US)
Citation (search report)
See references of WO 9904416A1
Designated contracting state (EPC)
DE FR GB NL
DOCDB simple family (publication)
US 6251551 B1 20010626; EP 0996968 A1 20000503; JP 2001510940 A 20010807; WO 9904416 A1 19990128
DOCDB simple family (application)
US 46282900 A 20000114; EP 9804049 W 19980701; EP 98939590 A 19980701; JP 2000503546 A 19980701