EP 1004075 A1 20000531 - TRANSLATED MEMORY PROTECTION APPARATUS FOR AN ADVANCED MICROPROCESSOR
Title (en)
TRANSLATED MEMORY PROTECTION APPARATUS FOR AN ADVANCED MICROPROCESSOR
Title (de)
SPEICHERSCHUTZEINRICHTUNG ZUM SCHUTZ GEGEN ÜBERSETZTE BEFEHLE FÜR EINEN MIKROPROZESSOR
Title (fr)
DISPOSITIF DE PROTECTION DE MEMOIRE D'INSTRUCTIONS TRADUITES POUR MICROPROCESSEUR EVOLUE
Publication
Application
Priority
US 9714117 W 19970811
Abstract (en)
[origin: WO9908191A1] A method of responding to an attempt to write a memory address including a target instruction which has been translated to a host instruction for execution by a host processor including the steps of marking a memory address including a target instruction which has been translated to a host instruction, detecting a memory address which has been marked when an attempt is made to write to the memory address, and responding to the detection of a memory address which has been marked by protecting a target instruction at the memory address until it has been assured that translations associated with the memory address will not be utilized before being updated.
IPC 1-7
IPC 8 full level
G06F 9/30 (2006.01); G06F 9/318 (2006.01); G06F 9/38 (2006.01); G06F 9/455 (2006.01); G06F 12/10 (2006.01); G06F 12/14 (2006.01)
CPC (source: EP KR)
G06F 9/3812 (2013.01 - EP); G06F 9/45504 (2013.01 - EP); G06F 12/14 (2013.01 - KR); G06F 12/145 (2013.01 - EP)
Designated contracting state (EPC)
AT BE CH DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE
DOCDB simple family (publication)
WO 9908191 A1 19990218; CA 2283560 A1 19990218; CA 2283560 C 20031209; EP 1004075 A1 20000531; EP 1004075 A4 20010117; JP 2001519955 A 20011023; JP 3621116 B2 20050216; KR 100421687 B1 20040310; KR 20010014096 A 20010226
DOCDB simple family (application)
US 9714117 W 19970811; CA 2283560 A 19970811; EP 97939380 A 19970811; JP 51207299 A 19970811; KR 19997012140 A 19970811