Global Patent Index - EP 1005012 A1

EP 1005012 A1 2000-05-31 - Digital addressing of a flat display panel

Title (en)

Digital addressing of a flat display panel

Title (de)

Digitale Addressierung einer flachen Anzeigetafel

Title (fr)

Adressage numérique d'un écran plat de visualisation

Publication

EP 1005012 A1 (FR)

Application

EP 99410169 A

Priority

FR 9815148 A

Abstract (en)

Flat screen is organized in matrix network and field emission cathode receives digital lighting level regulating pulse width to be applied during addressing time (t1) from grid. Luminous emission amplitude is maintained non constant during addressing time. Non constant variation follows law established from sensitivity of eye to light.

Abstract (fr)

L'invention concerne un procédé d'adressage numérique d'un écran plat de visualisation organisé en réseau matriciel et dont au moins une première électrode reçoit une consigne numérique d'éclairement réglant la largeur d'impulsions à appliquer pendant un temps d'adressage (t1) d'une deuxième électrode perpendiculaire. Ce procédé consiste à rendre non-constante l'amplitude d'émission lumineuse au cours du temps d'adressage de la deuxième électrode. <IMAGE>

IPC 1-7 (main, further and additional classification)

G09G 3/22

IPC 8 full level (invention and additional information)

G09G 3/20 (2006.01); G09F 9/30 (2006.01); G09G 3/22 (2006.01)

CPC (invention and additional information)

G09G 3/22 (2013.01); G09G 3/2011 (2013.01); G09G 3/2014 (2013.01); G09G 2310/066 (2013.01); G09G 2320/0276 (2013.01)

Citation (search report)

Designated contracting state (EPC)

DE FR GB IT

EPO simple patent family

EP 1005012 A1 20000531; EP 1005012 B1 20060125; DE 69929583 D1 20060413; DE 69929583 T2 20060928; FR 2786597 A1 20000602; FR 2786597 B1 20010209; JP 2000163006 A 20000616

INPADOC legal status


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