Global Patent Index - EP 1005012 B1

EP 1005012 B1 20060125 - Digital addressing of a flat display panel

Title (en)

Digital addressing of a flat display panel

Title (de)

Digitale Addressierung einer flachen Anzeigetafel

Title (fr)

Adressage numérique d'un écran plat de visualisation

Publication

EP 1005012 B1 20060125 (FR)

Application

EP 99410169 A 19991125

Priority

FR 9815148 A 19981127

Abstract (en)

[origin: EP1005012A1] Flat screen is organized in matrix network and field emission cathode receives digital lighting level regulating pulse width to be applied during addressing time (t1) from grid. Luminous emission amplitude is maintained non constant during addressing time. Non constant variation follows law established from sensitivity of eye to light.

IPC 8 full level

G09G 3/20 (2006.01); G09G 3/22 (2006.01); G09F 9/30 (2006.01)

CPC (source: EP)

G09G 3/22 (2013.01); G09G 3/2011 (2013.01); G09G 3/2014 (2013.01); G09G 2310/066 (2013.01); G09G 2320/0276 (2013.01)

Designated contracting state (EPC)

DE FR GB IT

DOCDB simple family (publication)

EP 1005012 A1 20000531; EP 1005012 B1 20060125; DE 69929583 D1 20060413; DE 69929583 T2 20060928; FR 2786597 A1 20000602; FR 2786597 B1 20010209; JP 2000163006 A 20000616

DOCDB simple family (application)

EP 99410169 A 19991125; DE 69929583 T 19991125; FR 9815148 A 19981127; JP 32802799 A 19991118