Global Patent Index - EP 1012981 A1

EP 1012981 A1 20000628 - CIRCUIT FOR PRODUCING A SIGNAL WITH ADJUSTABLE FREQUENCY

Title (en)

CIRCUIT FOR PRODUCING A SIGNAL WITH ADJUSTABLE FREQUENCY

Title (de)

SCHALTUNG ZUM ERZEUGEN EINES SIGNALS MIT EINSTELLBARER FREQUENZ

Title (fr)

CIRCUIT PERMETTANT DE GENERER UN SIGNAL DE FREQUENCE REGLABLE

Publication

EP 1012981 A1 20000628 (DE)

Application

EP 98951179 A 19980820

Priority

  • DE 9802436 W 19980820
  • DE 19739757 A 19970910

Abstract (en)

[origin: WO9913581A1] The invention relates to a circuit for producing a signal (OUT) with adjustable frequency, comprising a reference oscillator (18) for producing a reference signal (REF), a comparison signal device (10) with an adding value input (12) and a clock input (14) for producing a digital comparison signal (CMP), the frequency of said digital comparison signal (CMP) being dependent on an adding value signal (ADD) applied to the adding value input (12) and a clock signal (CLK) applied to the clock input (14), a phase comparer (20) for producing a tuning signal (TUNE) according to the result of a comparison between the phase of the reference signal (REF) and the phase of the comparison signal (CMP), and an oscillator (24) for producing the output signal (OUT), and an oscillator signal (OSC), said oscillator being controlled in dependence on the tuning signal (TUNE). The clock signal (CLK) at the clock input (14) of the comparison signal device (10) can be derived from said oscillator signal (OSC). A compensation device (40) which determines the comparison signal (CMP) according to the current counter reading of an accumulator (30) in the comparison signal device (10) and at least one error value of at least one earlier period or half-wave is also provided. Said compensation device (40) has a controllable time delay device (46) which is controlled by a random device (48) for example, or according to the quantization errors of previous cycles or alternations of the comparison signal (CMP). The inventive circuit produces a high-quality signal, is economical in terms of power consumption, is simple to construct and easy to install.

IPC 1-7

H03L 7/18; H03L 7/081

IPC 8 full level

H03L 7/08 (2006.01); H03L 7/081 (2006.01); H03L 7/18 (2006.01)

CPC (source: EP US)

H03L 7/081 (2013.01 - EP US); H03L 7/1806 (2013.01 - EP US)

Citation (search report)

See references of WO 9913581A1

Designated contracting state (EPC)

DE FR GB

DOCDB simple family (publication)

WO 9913581 A1 19990318; EP 1012981 A1 20000628; JP 2001516981 A 20011002; US 6233296 B1 20010515

DOCDB simple family (application)

DE 9802436 W 19980820; EP 98951179 A 19980820; JP 2000511253 A 19980820; US 52323500 A 20000310