EP 1018082 A1 20000712 - VARIABLE BLOCK SIZE 2-DIMENSIONAL INVERSE DISCRETE COSINE TRANSFORM ENGINE
Title (en)
VARIABLE BLOCK SIZE 2-DIMENSIONAL INVERSE DISCRETE COSINE TRANSFORM ENGINE
Title (de)
VARIABLE BLOCKGRÖSSE, ZWEIDIMENSIONALE, INVERSE DISKRETE COSINUS-TRANSFORMATIONSVORRICHTUNG
Title (fr)
MOTEUR DE TRANSFORMATION EN COSINUS DISCRETS INVERSE (IDCT) BIDIMENSIONNEL POUR LONGUEUR DE BLOC VARIABLE
Publication
Application
Priority
- US 9817423 W 19980824
- US 91809097 A 19970825
Abstract (en)
[origin: WO9910818A1] A variable block size 2-D IDCT engine (10) which can compute any arbitrary mix of transforms. A first 1-D IDCT processor (20a) computes the transform of the data block by columns and stores the intermediate results in a transposition memory. A second 1-D IDCT processor (20b) computes the transform of the intermediate results by rows. Different mix of transforms can be easily performed by correctly ordering the input data, selectively combining the input data before the butterfly stages, and controlling the additions and multiplications at each stage of butterfly. The unnecessary butterflies are placed in the bypass mode. The butterflies can be implemented with serial adders (56) and bit-serial multipliers to greatly simplify the hardware design and minimize the routing requirements between successive stages of butterfly. The fully pipelined structure allows the IDCT engine to maintain a throughput rate of one pixel per clock cycle.
IPC 1-7
IPC 8 full level
G06F 17/14 (2006.01)
CPC (source: EP KR)
G06F 17/14 (2013.01 - KR); G06F 17/147 (2013.01 - EP)
Citation (search report)
See references of WO 9910818A1
Designated contracting state (EPC)
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE
DOCDB simple family (publication)
WO 9910818 A1 19990304; AU 9030298 A 19990316; CN 1268231 A 20000927; EP 1018082 A1 20000712; KR 20010023031 A 20010326
DOCDB simple family (application)
US 9817423 W 19980824; AU 9030298 A 19980824; CN 98808477 A 19980824; EP 98942197 A 19980824; KR 20007001644 A 20000218