EP 1023681 A1 20000802 - SYSTEM FOR LOGIC EXTRACTION FROM A LAYOUT DATABASE
Title (en)
SYSTEM FOR LOGIC EXTRACTION FROM A LAYOUT DATABASE
Title (de)
SYSTEM ZUR LOGISCHEN EXTRAKTION AUS EINER DATENBANK-ANORDNUNG
Title (fr)
SYSTEME POUR L'EXTRACTION DE STRUCTURE LOGIQUE D'UNE BASE DE DONNEES D'IMPLANTATION
Publication
Application
Priority
US 9718844 W 19971014
Abstract (en)
[origin: WO9919818A1] A system and process for logic extraction (15) from the layout of logic blocks (14) is described. Logic design information (15) is extracted from a transistor level net list which is stored in a memory (14). The transistor level net list in turn is generated from a layout polygon database using techniques in the art. The logic extraction process (15) comprises processing the transistor level net list in the memory to define groups of transistors according to whether there is a connection or not to a supply voltage, to a reference voltage, and according to the transistor type (201). The groups of transistors are analyzed according to their interconnections, and their membership in the groups (202). Finally, logic units are identified in response to the step of analyzing groups of transistors (203).
IPC 1-7
IPC 8 full level
G06F 17/50 (2006.01); H01L 21/82 (2006.01)
CPC (source: EP)
G06F 30/30 (2020.01)
Designated contracting state (EPC)
DE FR GB IT
DOCDB simple family (publication)
WO 9919818 A1 19990422; EP 1023681 A1 20000802; EP 1023681 A4 20001025; JP 2001520420 A 20011030
DOCDB simple family (application)
US 9718844 W 19971014; EP 97912778 A 19971014; JP 2000516301 A 19971014