Global patent index - EP 1034569 A2

EP 1034569 A2 2000-09-13 - IN x?Ga 1-x?P STOP-ETCH LAYER FOR SELECTIVE RECESS OF GALLIUM ARSENIDE-BASED EPTITAXIAL FIELD EFFECT TRANSISTORS AND PROCESS THEREFOR

Title (en)

IN x?Ga 1-x?P STOP-ETCH LAYER FOR SELECTIVE RECESS OF GALLIUM ARSENIDE-BASED EPTITAXIAL FIELD EFFECT TRANSISTORS AND PROCESS THEREFOR

Title (de)

INXGA1-XP ÄTZSTOPPSCHICHT FÜR SELEKTIF GEFORMTEN GRABEN VON EPITAXIALEN FELDEFFEKTTRANSISTOREN BASIERT AUF GALLIUMARSENID UND DIESBEZÜGLICHES HERSTELLUNGSVERFAHREN

Title (fr)

COUCHE DE CONTACT DE GRAVURE IN x?Ga 1-x?P POUR LA CREATION SELECTIVE D'EVIDEMENTS DANS LA FABRICATION DE TRANSISTORS A EFFETS DE CHAMP EPITAXIAUX DE TYPE GA-AR

Publication

EP 1034569 A2 (EN)

Application

EP 98960406 A

Priority

  • US 9825011 W
  • US 6653997 P
  • US 12114498 A

Abstract (en)

[origin: WO9927586A2] The present invention is drawn to an InxGa1-xP etch-stop layer for improving the uniformity of devices across an epitaxial wafer incorporating a high-low-high MESFET structure. The range of permissable values of x will vary as a function of the thickness of the etch-stop layer. To this end, preferably x is on the order of 0.5 in order to maintain lattice match with the GaAs substrate. Also, a novel process for selective recess etching of GaAs field-effect transistors is disclosed. The present invention envisions the use of a relatively thin (10-30 Angstrom) layer of the InxGa1-xP material to effect the selective recess etching of the material to a point where a relatively uniform thickness of n material remaining above the channel layer is realized.

IPC 1-7 (main, further and additional classification)

H01L 29/812; H01L 21/338

IPC 8 full level (invention and additional information)

H01L 21/285 (2006.01); H01L 21/306 (2006.01); H01L 21/338 (2006.01); H01L 29/812 (2006.01)

CPC (invention and additional information)

H01L 29/66863 (2013.01); H01L 21/28587 (2013.01); H01L 21/30612 (2013.01); H01L 29/8128 (2013.01)

Citation (search report)

See references of WO 9927586A3

Designated contracting state (EPC)

DE FR GB IT NL SE

EPO simple patent family

WO 9927586 A2 19990603; WO 9927586 A3 19991014; AU 1600799 A 19990615; CA 2311564 A1 19990603; EP 1034569 A2 20000913; JP 2001524759 A 20011204

INPADOC legal status

2005-09-28 [18D] DEEMED TO BE WITHDRAWN

- Ref Legal Event Code: 18D

- Effective date: 20050330

2005-01-05 [17Q] FIRST EXAMINATION REPORT

- Ref Legal Event Code: 17Q

- Effective date: 20041117

2000-09-13 [17P] REQUEST FOR EXAMINATION FILED

- Ref Legal Event Code: 17P

- Effective date: 20000606

2000-09-13 [AK] DESIGNATED CONTRACTING STATES:

- Ref Legal Event Code: AK

- Designated State(s): DE FR GB IT NL SE