EP 1057262 A1 20001206 - OVERVOLTAGE-PROTECTED I/O BUFFER
Title (en)
OVERVOLTAGE-PROTECTED I/O BUFFER
Title (de)
GEGEN ÜBERSPANNUNGEN GESCHÜTZTER EINGANGS/AUSGANGPUFFER
Title (fr)
TAMPON E/S PROTEGE CONTRE LES SURTENSIONS
Publication
Application
Priority
- EP 99961033 A 19991201
- EP 9909357 W 19991201
- EP 98204343 A 19981218
Abstract (en)
[origin: WO0038322A1] A tristate I/O buffer (101) suitable for cooperation with modules (31) which operate at a higher supply voltage than the supply voltage of the buffer (101). The output (4) of the buffer (101) is provided with an overvoltage protection circuit (110) which prevents current leakage from the output (4) to the supply voltage line (VDD) of the buffer (101). The overvoltage protection circuit (110) comprises a PMOS blocking transistor (120), a first PMOS control transistor (130) and a second NMOS control transistor (140). The two control transistors (130, 140) are controlled by a control signal which is derived solely from the enable signal (E).
IPC 1-7
IPC 8 full level
H01L 21/822 (2006.01); H01L 21/8238 (2006.01); H01L 27/04 (2006.01); H01L 27/092 (2006.01); H03K 19/003 (2006.01); H03K 19/0175 (2006.01)
CPC (source: EP KR)
H03K 19/00315 (2013.01 - EP KR); H03K 19/018521 (2013.01 - KR)
Citation (search report)
See references of WO 0038322A1
Designated contracting state (EPC)
AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE
DOCDB simple family (publication)
WO 0038322 A1 20000629; EP 1057262 A1 20001206; JP 2002533971 A 20021008; KR 20010040990 A 20010515
DOCDB simple family (application)
EP 9909357 W 19991201; EP 99961033 A 19991201; JP 2000590297 A 19991201; KR 20007009002 A 20000817