Global Patent Index - EP 1079514 A1

EP 1079514 A1 2001-02-28 - Frequency synthesizer comprising a phase loop

Title (en)

Frequency synthesizer comprising a phase loop

Title (de)

Frequenzsynthesizer mit einer Phasenschleife

Title (fr)

Synthétiseur de fréquence à boucle de phase

Publication

EP 1079514 A1 (FR)

Application

EP 00402323 A

Priority

FR 9910798 A

Abstract (en)

The frequency synthesizer comprises a block (13) for the determination of real gain of voltage-controlled oscillator (1) on the basis of measured parameters, voltage and frequency, and the delivery of signal representative of real gain. The synthesizer also comprises means for an input of modulation signal between the phase comparator (7) of the phase-locked loop (PLL) and the modulation branch (34) with a divider (38) by real gain (KVCO), a digital-analogue converter (40), and an adder (42). A compensation block (50) generates a signal on the basis of modulation signal for input to the feedback loop (9) upstream of divider (8) by N, in a manner to annul the modulation of signal at the output of voltage-controlled oscillator. The sythesizer also comprises a local oscillator (3) connected to one input of the phase comparator (7), the other input connected to the output of voltage-controlled oscillator via the feedback loop (9), and a low-pass filter (5). The gain determination block (13) contains a sampler (15) for voltage measure at two frequencies, an analogue-digital converter (17), and a computing unit (19) for the computation of real gain (KVCO) of voltage-controlled oscillator (VCO). The block (13) also comprises a temperature sensor, a memory table of VCO gain as a function of temperature, and a control unit for the delivery of real gain of VCO as a function of measured temperature and the gain values stored in memory table. The block (13) also function of operating time, and a control unit for the delivery of real gain of VCO as a function of multiplier (52) by 2.pi, an accumulator (54), I and Q (in-phase and quadrature) signals generator (56), first and second digital-analogue converters (58,60) for I and Q signals, respectively, mixers (62,64), a phase-shifter (66) by pi/2 of VCO output signal, and an adder (68).

Abstract (fr)

L'invention concerne un synthétiseur de fréquences à boucle de phase comportant des moyens (13) de détermination du gain réel de l'oscillateur commandé en tension (1) à partir d'au moins un paramètre de mesure, ces moyens (13) de détermination étant aptes à délivrer un signal représentatif du gain réel de l'oscillateur commandé en tension (1). Des moyens (30,32,34,38,40,42) sont prévus pour introduire un signal de modulation entre le comparateur de phase (7) de la boucle de phase et l'oscillateur (1) commandé en tension de ladite boucle de phase. Par ailleurs des moyens (50) de compensation de modulation sont prévus pour préparer à partir du signal de modulation un signal de compensation et pour introduire celui-ci dans la boucle de retour (9) en amont d'un compteur diviseur (8) disposé dans celle-ci, de manière à annuler la modulation du signal de l'oscillateur commandé en tension. <IMAGE>

IPC 1-7 (main, further and additional classification)

H03C 3/09

IPC 8 full level (invention and additional information)

H03L 7/187 (2006.01); H03C 3/09 (2006.01); H03L 7/093 (2006.01); H03L 7/10 (2006.01); H03L 7/189 (2006.01)

CPC (invention and additional information)

H03C 3/0983 (2013.01); H03C 3/0941 (2013.01); H03C 3/095 (2013.01); H03C 3/0975 (2013.01); H03L 7/189 (2013.01)

Citation (search report)

Designated contracting state (EPC)

AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

EPO simple patent family

EP 1079514 A1 20010228; CN 1286532 A 20010307; FR 2798019 A1 20010302; FR 2798019 B1 20020816; JP 2001094422 A 20010406; SG 109429 A1 20050330; US 6441690 B1 20020827

INPADOC legal status


2008-12-17 [18D] DEEMED TO BE WITHDRAWN

- Effective date: 20080701

2008-03-28 [REG HK WD] APPLICATIONS WITHDRAWN, DEEMED TO BE WITHDRAWN, OR REFUSED AFTER PUBLICATION IN HONG KONG

- Document: HK 1033393

2008-01-23 [17Q] FIRST EXAMINATION REPORT

- Effective date: 20071221

2007-04-04 [RAP1] TRANSFER OF RIGHTS OF AN EP PUBLISHED APPLICATION

- Owner name: ALCATEL LUCENT

2001-11-14 [AKX] PAYMENT OF DESIGNATION FEES

- Free text: AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

2001-10-24 [17P] REQUEST FOR EXAMINATION FILED

- Effective date: 20010828

2001-02-28 [AK] DESIGNATED CONTRACTING STATES:

- Kind Code of Ref Document: A1

- Designated State(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

2001-02-28 [AX] REQUEST FOR EXTENSION OF THE EUROPEAN PATENT TO

- Free text: AL;LT;LV;MK;RO;SI