Global patent index - EP 1080410 A1

EP 1080410 A1 2001-03-07 - VLSI EMULATOR COMPRISING PROCESSORS AND RECONFIGURABLE CIRCUITS

Title (en)

VLSI EMULATOR COMPRISING PROCESSORS AND RECONFIGURABLE CIRCUITS

Title (de)

VLSI EMULATOR MIT PROZESSOREN UND REKONFIGURABLEN KREISLÄUFEN

Title (fr)

EMULATEUR A TRES HAUTE INTEGRATION COMPRENANT DES PROCESSEURS ET DES CIRCUITS RECONFIGURABLES

Publication

EP 1080410 A1 (EN)

Application

EP 00911468 A

Priority

  • KR 0000229 W
  • KR 19990009307 A

Abstract (en)

[origin: WO0057273A1] Disclosed is an apparatus for verifying a VLSI design at an early stage as well as a later stage, and particularly a VLSI emulator based on processors and reconfigurable chips. The model of the VLSI chip is divided into a functional part and an external interface part. The functional part is executed by a processing module having at least one processor, and the external interface part is executed by an external interface signal processor to generate real pin signals. The external interface part is implemented using reconfigurable circuits by programming the circuits. The communicating between the functional part and the external interface part is accomplished by transmitting and/or receiving control packets composed of control commands and/or or data. The intenal functional part and the external interface part are verified on a target system at an early stage of the VLSI design, which may reduce time for designing the VLSI and verifying and designing whole system.

IPC 1-7 (main, further and additional classification)

G06F 9/455; G06F 17/00

IPC 8 full level (invention and additional information)

G06F 11/22 (2006.01); G06F 9/455 (2006.01); G06F 17/50 (2006.01)

CPC (invention and additional information)

G06F 17/5027 (2013.01); G06F 17/5022 (2013.01)

Citation (search report)

See references of WO 0057273A1

Designated contracting state (EPC)

FR GB

EPO simple patent family

WO 0057273 A1 20000928; AU 3333600 A 20001009; EP 1080410 A1 20010307; JP 2000298596 A 20001024; JP 3504572 B2 20040308; KR 100306596 B1 20010929; KR 20000060737 A 20001016

INPADOC legal status

2007-03-21 [18D] DEEMED TO BE WITHDRAWN

- Ref Legal Event Code: 18D

- Effective date: 20060927

2004-06-24 [REG DE 8566] DESIGNATED COUNTRY DE NOT LONGER VALID

- Ref Legal Event Code: 8566

2004-05-19 [RBV] DESIGNATED CONTRACTING STATES (CORRECTION):

- Ref Legal Event Code: RBV

- Designated State(s): FR GB

2001-03-07 [17P] REQUEST FOR EXAMINATION FILED

- Ref Legal Event Code: 17P

- Effective date: 20000904

2001-03-07 [AK] DESIGNATED CONTRACTING STATES:

- Ref Legal Event Code: AK

- Designated State(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE