Global Patent Index - EP 1091489 A3

EP 1091489 A3 20040609 - Multi-stage, low-offset, fast recovery, comparator system and method

Title (en)

Multi-stage, low-offset, fast recovery, comparator system and method

Title (de)

Mehrstufiges Komparatorsystem und -Verfahren mit schneller Erholungszeit und geringem Offset

Title (fr)

Système et procédé comparateur à plusieurs étages, récuperation rapide et tension de décalage faible

Publication

EP 1091489 A3 20040609 (EN)

Application

EP 00307335 A 20000825

Priority

US 41265999 A 19991005

Abstract (en)

[origin: EP1091489A2] A multi-stage, low-offset, fast-recovery, comparator system and method for: reducing the input offset voltage of the zeroing amplifier by a factor essentially equal to gain of the zeroing amplifier; reducing the input offset voltage of the combined main and zeroing amplifiers by a factor essentially equal to the product of the gains of the main and zeroing amplifiers; and amplifying the input signal to the amplification stage in accordance with the gain of the main amplifier to generate an amplified high-resolution signal. <IMAGE>

IPC 1-7

H03K 5/24; H03F 3/45

IPC 8 full level

H03K 5/08 (2006.01); H03F 1/34 (2006.01); H03F 3/34 (2006.01); H03F 3/45 (2006.01); H03F 3/68 (2006.01); H03K 5/24 (2006.01)

CPC (source: EP US)

H03F 3/45183 (2013.01 - EP US); H03F 3/45475 (2013.01 - EP US); H03F 3/45753 (2013.01 - EP US); H03F 3/45977 (2013.01 - EP US); H03K 5/2481 (2013.01 - EP US); H03K 5/249 (2013.01 - EP US); H03F 2203/45702 (2013.01 - EP US)

Citation (search report)

  • [YA] EP 0363332 A2 19900411 - SGS THOMSON MICROELECTRONICS [IT]
  • [A] EP 0129644 A1 19850102 - LANDIS & GYR AG [CH]
  • [A] EP 0407859 A1 19910116 - NAT SEMICONDUCTOR CORP [US]
  • [XY] CAIULO G ET AL: "Design of high-accuracy video comparator", CIRCUITS AND SYSTEMS, 1994. ISCAS '94., 1994 IEEE INTERNATIONAL SYMPOSIUM ON LONDON, UK 30 MAY-2 JUNE 1994, NEW YORK, NY, USA,IEEE, US, 30 May 1994 (1994-05-30), pages 101 - 104, XP010143147, ISBN: 0-7803-1915-X
  • [A] MINAMIZAKI H ET AL: "P-14: LOW OUTPUT OFFSET, 8 BIT SIGNAL DRIVERS FOR SGA/SVGA TFT-LCDS", PROCEEDINGS OF THE 16TH. INTERNATIONAL DISPLAY RESEARCH CONFERENCE. EURODISPLAY 96 BIRMINGHAM, OCT. 1 - 3, 1996, EURODISPLAY. SID'S INTERNATIONAL DISPLAY RESEARCH CONFERENCE, vol. CONF. 16, 1 October 1996 (1996-10-01), pages 247 - 250, XP000729556, ISSN: 1083-1312

Designated contracting state (EPC)

AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

DOCDB simple family (publication)

EP 1091489 A2 20010411; EP 1091489 A3 20040609; EP 1091489 B1 20081029; AT E413017 T1 20081115; DE 60040643 D1 20081211; JP 2001144556 A 20010525; JP 3683486 B2 20050817; US 6429697 B1 20020806

DOCDB simple family (application)

EP 00307335 A 20000825; AT 00307335 T 20000825; DE 60040643 T 20000825; JP 2000270176 A 20000906; US 41265999 A 19991005