Global Patent Index - EP 1130631 A1

EP 1130631 A1 20010905 - Process for forming a buried cavity in a semiconductor material wafer

Title (en)

Process for forming a buried cavity in a semiconductor material wafer

Title (de)

Herstellungsverfahren eines vergrabenen Hohlraumes in einer Halbleiterscheibe

Title (fr)

Procédé de fabrication d'une cavité enterrée dans une plaqette semi-conductrice

Publication

EP 1130631 A1 20010905 (EN)

Application

EP 00830148 A 20000229

Priority

EP 00830148 A 20000229

Abstract (en)

The process comprises the steps of forming, on top of a semiconductor material wafer (10), a holed mask (16) having a lattice structure and comprising a plurality of openings (18) each having a substantially square shape and a side with an inclination of 45 DEG with respect to the flat (110) of the wafer; carrying out an anisotropic etch in TMAH of the wafer (10), using said holed mask (16), thus forming a cavity (20), the cross section of which has the shape of an upside-down isosceles trapezium; and carrying out a chemical vapour deposition (CVD) using TEOS, thus forming a TEOS layer (24) which completely closes the openings of the holed mask (16) and defines a diaphragm (26) overlying the cavity (20) and on which a suspended integrated structure can subsequently be manufactured. <IMAGE> <IMAGE> <IMAGE>

IPC 1-7

H01L 21/308

IPC 8 full level

B81C 1/00 (2006.01); G01N 37/00 (2006.01); H01L 21/306 (2006.01); H01L 21/308 (2006.01); H01L 21/314 (2006.01); H01L 21/316 (2006.01); H01L 21/822 (2006.01); H01L 27/04 (2006.01)

CPC (source: EP US)

B81C 1/00404 (2013.01 - EP US)

Citation (applicant)

Citation (search report)

  • [XA] DE 19621349 A1 19971204 - ZENTR MIKROELEKT DRESDEN GMBH [DE]
  • [Y] EP 0658927 A1 19950621 - ANT NACHRICHTENTECH [DE]
  • [YA] "METHOD OF MAKING SEPARATE REGIONS OF VARIOUS AVERAGE DEPTHS WITH ONE ANISOTROPIC ETCH", RESEARCH DISCLOSURE,GB,INDUSTRIAL OPPORTUNITIES LTD. HAVANT, no. 316, 1 August 1990 (1990-08-01), pages 688 - 689, XP000141023, ISSN: 0374-4353
  • [A] DATABASE WPI Section Ch Week 199812, Derwent World Patents Index; Class L03, AN 1998-128965, XP002144373 & SE 513072 C2 20000703 - ACREO AB [SE]
  • [A] ZOU Q B ET AL: "SINGLE-CHIP FABRICATION OF INTEGRATED FLUID SYSTEMS (IFS)", IEEE WORKSHOP ON MICRO ELECTRO MECHANICAL SYSTEMS,US,NEW YORK, NY: IEEE, 25 January 1998 (1998-01-25), pages 448 - 453, XP000829203, ISBN: 0-7803-4413-8

Citation (examination)

JP S59172246 A 19840928 - SEIKO INSTR & ELECTRONICS

Designated contracting state (EPC)

DE FR GB IT

DOCDB simple family (publication)

EP 1130631 A1 20010905; JP 2001291839 A 20011019; JP 2006237643 A 20060907; JP 4555254 B2 20100929; US 2001049200 A1 20011206; US 2004106290 A1 20040603; US 6693039 B2 20040217; US 6992367 B2 20060131

DOCDB simple family (application)

EP 00830148 A 20000229; JP 2001054817 A 20010228; JP 2006135628 A 20060515; US 71221103 A 20031112; US 79720601 A 20010227