Global Patent Index - EP 1160642 A1

EP 1160642 A1 2001-12-05 - Current limiting circuit

Title (en)

Current limiting circuit

Title (de)

Strombegrenzungsschaltung

Title (fr)

Circuit de limitation de courant

Publication

EP 1160642 A1 (DE)

Application

EP 01109666 A

Priority

DE 10026793 A

Abstract (en)

The circuit provides current limiting for varying load currents in circuits with a current supply for a series circuit including a load current control FET and a load. A differential amplifier (3) is provided. A reference voltage source is connected to the second input of the amplifier. The output is connected to the gate of the FET. A current mirror including a mirror control FET and the load current control FET (1) is arranged such that the sources of both FETs are connected to an operating voltage source (9). The mirror is in a control path comprising a current mirror coupling FET whose source is connected to the drain of the mirror control FET, and whose drain is connected to the first input of the amplifier (3). The drain of the coupling FET is connected in series with a current limiting resistor (6) to earth. The amplifier output is connected to the gate of the mirror control FET. A second differential amplifier (7) is provided. The first input is connected to the source of the coupling FET. The second input is connected to the load (2) and to the drain of the load FET (1). The output is connected to the gate of the coupling FET.

Abstract (de)

Die Erfindung betrifft eine Schaltungsanordnung zur Strombegrenzung veränderlicher Lastströme in Schaltungen mit einer Stromeinspeisung für eine Reihenschaltung bestehend aus einem Laststrom-Steuer-FET und einem Verbraucher, wobei die Reihenschaltung zwischen Stromeinspeisung und Masse geschaltet wird. Die Aufgabe der Erfindung besteht darin, eine Laststrombegrenzung so auszuführen, daß diese dem Verbraucher den möglichst vollständigen Betriebsspannungsbereich zur Verfügung stellt. Dies wird dadurch gelöst, daß die Stromspeisung des Laststromes über einen Strompfad, dem Laststrompfad, eines Stromspiegels erfolgt, wobei in einem anderen Strompfad des Stromspiegels, dem Stromspiegel-Steuerpfad, durch die sinnvolle Einkopplung des vom Verbraucher verursachten Laststrompotentiales über einem Strombegrenzungswiderstand ein repräsentativer gespiegelter Laststrom geprägt wird und dessen Potentialwirkung über einen Differenzverstärker mit einer Referenzspannung verglichen und nachfolgend mit dem verstärkten Differenzsignal das gemeinsame Gate der Stromspiegel-FETs angesteuert wird. Hierbei kann für die Stromspiegel-Transistoren ein solcher Arbeitspunkt realisiert werden, der auch bei Vorliegen des maximalen Laststromes eine niedrige Source-Drainspannung und damit ein maximaler Betriebsspannungsbereich ermöglicht. <IMAGE>

IPC 1-7 (main, further and additional classification)

G05F 3/26

IPC 8 full level (invention and additional information)

G05F 3/26 (2006.01)

CPC (invention and additional information)

G05F 3/262 (2013.01)

Citation (search report)

Designated contracting state (EPC)

AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR

EPO simple patent family

EP 1160642 A1 20011205; EP 1160642 B1 20110525; AT 511133 T 20110615; DE 10026793 A1 20020103

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