EP 1162543 A2 20011212 - A system for transferring data reusing a plurality of data transferring area cyclically
Title (en)
A system for transferring data reusing a plurality of data transferring area cyclically
Title (de)
Datenübertragungssystem zur zyklischen Wiederverwendung von einer Mehrzahl von Datenübertragungsbereich
Title (fr)
Système de transfert de données réutilisant cycliquement une pluralité de zones de transfert de données
Publication
Application
Priority
JP 2000175536 A 20000607
Abstract (en)
A data transfer controller is provided which can reduce a CPU control load necessary for data transfer cyclically using a plurality of data transfer areas. A DMAC (3) constituting the data transfer controller is initially set with a transfer start address of a transfer source or transfer destination by a CPU (2), issues an interrupt (110, 111, 104) to CPU each time the data transfer responding to a transfer request from the transfer source reaches a predetermined data amount based upon the transfer start address, and initializes an address of the transfer source or transfer destination to the transfer start address each time the interrupt is issued predetermined plural times. After CPU sets once the data transfer conditions to DMAC, CPU can continue data processing by repetitively using a limited number of memory areas (MA, MB), without performing any process of repetitively setting the data transfer conditions necessary for a data transfer control for receiving voice data. <IMAGE>
IPC 1-7
IPC 8 full level
G06F 12/02 (2006.01); G06F 13/28 (2006.01)
CPC (source: EP KR US)
G06F 13/00 (2013.01 - KR); G06F 13/28 (2013.01 - EP US)
Designated contracting state (EPC)
DE FR GB IT NL
DOCDB simple family (publication)
EP 1162543 A2 20011212; EP 1162543 A3 20041117; JP 2001350713 A 20011221; KR 20010110651 A 20011213; TW 518469 B 20030121; US 2002026551 A1 20020228
DOCDB simple family (application)
EP 01304940 A 20010606; JP 2000175536 A 20000607; KR 20010030748 A 20010601; TW 90113862 A 20010607; US 87324201 A 20010605